IP Library Granted Patent US 7,736,929
Granted Patent B1
US 7,736,929 · App. 11/716,422 · Granted Jun 15, 2010

Thin film microshells incorporating a getter layer

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Quick Facts
Patent No.
US 7,736,929
App. No.
11/716,422
Granted
Jun 15, 2010
Kind
B1
Abstract

Low temperature, multi-layered microshells for encapsulation of devices such as MEMS and microelectronics. The microshells may include a perforated pre-sealing layer, below which a sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The pre-sealing layer includes a large surface area getter layer to remove contaminants from the space ultimately enclosed by the microshell to improve the pressure control and cleanliness of the microshell.

Claims (26)

1. A method of forming a microshell over a substrate, comprising:

depositing a sacrificial material over the substrate;

etching a first partial thickness of the sacrificial material with a first mask to define a perimeter trench in the sacrificial material;

etching a second partial thickness of the sacrificial material with a second mask to form a protrusion of sacrificial material extending upwards from a top surface of the sacrificial material confined within the perimeter trench and to transfer the perimeter trench through the sacrificial material;

forming a pre-sealing layer on the sacrificial layer to cover the protrusion and the perimeter trench, wherein the pre-sealing layer further comprises a getter layer on a permeable layer;

perforating the pre-sealing layer to expose the sacrificial layer;

removing the sacrificial layer to form a chamber under the pre-sealing layer; and

sealing the perforated pre-sealing layer.

2. The method of claim 1 , wherein forming the getter layer on the permeable layer further comprises depositing a getter material adjacent to the sidewalls of the protrusion of sacrificial material to increase the surface area of the getter layer.

3. The method of claim 1 , wherein the second mask defines staggered rows of protrusions to form within the perimeter trench a crenulated sacrificial layer which distributes stresses in the subsequently deposited pre-sealing and sealing layers.

4. The method of claim 1 , wherein the sacrificial material is etched to form the protrusion with a sloped profile.

5. The method of claim 1 , wherein the getter layer is titanium.

6. The method of claim 1 , wherein the permeable layer is a silicon oxide.

7. The method of claim 1 , wherein perforating the pre-sealing layer further comprises planarizing the pre-sealing layer to perforate the pre-sealing layer with the protrusion of the sacrificial layer.

8. The method of claim 7 , wherein the getter layer remains non-planar after the planarizing of the pre-sealing layer.

9. The method of claim 1 , wherein sealing the pre-sealing layer further comprises:

nonconformally depositing a dielectric to occlude the perforation; and

depositing a metal to hermetically seal the perforated pre-sealing layer.

10. The method of claim 9 , wherein the chamber is heated for at least 30 seconds to a temperature above 400° C. before depositing the dielectric to desorb contaminants.

11. The method of claim 9 , wherein the dielectric is deposited with the substrate tilted by a small angle relative to a predominant ion flux in the deposition chamber to reduce back-deposition of the sealing material.

12. The method of claim 1 , further comprising:

etching through the sealing layer to expose a metal ground ring adjacent to the chamber; and

depositing a conductive layer on the sealing layer and ground ring to electrically ground the microshell.

13. The method of claim 12 , further comprising:

depositing a semiconductor layer over the conductive layer to structurally reinforce the microshell.

14. The method of claim 13 , wherein the semiconductor layer comprises germanium to form a germanosilicide.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2010
From: SILICON LABS SC, INC.
To: SILICON LABORATORIES INC.
Reel/Frame 025366/0466 →
CHANGE OF NAME Recorded May 4, 2010
From: SILICON CLOCKS, INC.
To: SILICON LABS SC, INC.
Reel/Frame 024369/0134 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2007
From: MONADGEMI, PEZHMAN; QUEVY, EMMANUEL P.; HOWE, ROGER T.
To: SILICON CLOCKS, INC.
Reel/Frame 019045/0044 →