Method and architecture for digital pulse shaping and rate conversion

1. A pulse shaping filter comprising:

a plurality of memory elements;

a plurality of taps connected to the plurality of memory elements, a total number of the plurality of taps being independent of a sampling rate; and

a selector configured to select outputs from the plurality of taps to define a pulse shaped output;

data stored within the plurality of taps triggering the loading of coefficients into the plurality of memory elements according to the following:

        If x k equals to ‘0’ then

         Reg ij = h ij ;

        Else if x k equals to ‘1’ then

         Reg ij = − h ij ;

        Else

         Reg ij = 0;

where 0 ≦ k < m, 0 ≦ i < m and 0 ≦ j < n,

m is the number of the plurality of taps, Reg ij is a given memory element, x is an input signal to the plurality of taps, h defines the coefficients in the plurality of memory elements, and n is a multiplier of a sample clock signal.

2. The pulse shaping filter in accordance with claim 1 wherein the pulse shaped output comprises an over-sampling rate (OSR).

3. The pulse shaping filter in accordance with claim 1 wherein the input signal to the plurality of taps comprises a symbol clock signal.

4. The pulse shaping filter in accordance with claim 3 further comprising a counter connected to the selector, and wherein the sample clock signal is also provided as an input to the counter, and wherein the sample clock signal is n times faster than the symbol clock signal.

5. The pulse shaping filter in accordance with claim 1 wherein the plurality of memory elements are configured in rows and columns, and wherein each of the plurality of taps is connected to a different column of memory elements.

6. The pulse shaping filter in accordance with claim 1 wherein the plurality of memory elements are configured in rows and columns, and further comprising a plurality of adders configured to add outputs of the memory elements in each row.

7. The pulse shaping filter in accordance with claim 1 wherein the plurality of memory elements are configured to store pulse shaping coefficients.

8. The pulse shaping filter in accordance with claim 7 wherein the pulse shaping coefficients comprise variable values.

9. The pulse shaping filter in accordance with claim 1 wherein the plurality of memory elements, the plurality of taps and the selector are configured to provide Gaussian pulse filtering.

10. The pulse shaping filter in accordance with claim 1 wherein an input signal received by the plurality of taps comprises a binary bit stream.

11. The pulse shaping filter in accordance with claim 10 wherein the binary bit stream is clocked at a rate of 1/Tb, where Tb=3.692e−6.

12. The pulse shaping filter in accordance with claim 1 further comprising a counter connected to the selector and wherein the counter has a bit width of Log 2 (L n−1 ).

13. A method of pulse shaping comprising:

generating coefficient values without using multipliers;

storing the coefficient values in a plurality of memory elements;

varying the stored coefficient values; and

generating a pulsed shaped output based on the stored coefficient values;

storing data within a plurality of taps connected to the plurality of memory elements;

triggering the loading of coefficients into the plurality of memory elements based upon the data stored within the plurality of taps and according to the following:

If x k equals ‘0’ then

Reg ij =h ij ;

Else if x k equals ‘1’ then

Reg ij =−h ij ;

Else

Reg ij =0;

where 0≦k<m, 0≦i<m and 0≦j<n, m is the number of the plurality of taps, Reg ij is a given memory element, x is an input signal to the plurality of taps, h defines the coefficients in the plurality of memory elements, and n is a multiplier of a sample clock signal.