IP Library Granted Patent US 7,939,853
Granted Patent B2
US 7,939,853 · App. 11/725,823 · Granted May 10, 2011

Termination and contact structures for a high voltage GaN-based heterojunction transistor

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Quick Facts
Patent No.
US 7,939,853
App. No.
11/725,823
Granted
May 10, 2011
Kind
B2
Abstract

A semiconductor device is provided that includes a substrate, a first active layer disposed over the substrate, and a second active layer disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer. A termination layer, which is disposed on the second active layer, includes InGaN. Source, gate and drain contacts are disposed on the termination layer.

Claims (15)

1. A semiconductor device, comprising:

a substrate;

a first active layer disposed over the substrate;

a second active layer disposed on the first active layer, the second active layer having a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer, wherein the second active layer includes first and second recesses formed therein;

a source and drain contact disposed in the first and second recesses, respectively;

a gate electrode disposed over the second active layer; and

a termination layer disposed over the second active layer and wherein the source and drain contacts extend through the termination layer.

2. The semiconductor device according to claim 1 wherein the termination layer comprises InGaN.

3. The semiconductor device according to claim 1 wherein the termination layer is selected from the group consisting of Fe-doped GaN, Si-doped GaN, FeN and SiN.

4. The semiconductor device according to claim 1 , wherein the first active layer comprises a group III nitride semiconductor material.

5. The semiconductor device according claim 4 , wherein the first active layer comprises GaN.

6. The semiconductor device according to claim 1 , wherein the termination layer comprises a flash layer.

7. The semiconductor device according to claim 6 , wherein the flash layer comprises Al.

8. The semiconductor device according to claim 6 , wherein the flash layer comprises Ga.

9. The semiconductor device according to claim 6 , wherein the flash layer comprises In.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2010
From: VELOX SEMICONDUCTOR CORPORATION
To: POWER INTEGRATIONS, INC.
Reel/Frame 024927/0893 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2007
From: MURPHY, MICHAEL; POPHRISTIC, MILAN
To: VELOX SEMICONDUCTOR CORPORATION
Reel/Frame 019125/0055 →