IP Library Granted Patent US 7,747,173
Granted Patent B1
US 7,747,173 · App. 11/728,841 · Granted Jun 29, 2010

Multi-phase clocking of integrated circuits using photonics

Assignee: Oracle America, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,747,173
App. No.
11/728,841
Granted
Jun 29, 2010
Kind
B1
Abstract

Embodiments of an integrated circuit are described. This integrated circuit includes a clock-generator circuit configured to provide a clock signal and an optical clock path coupled to the clock-generator circuit. Note that the optical clock path is configured to distribute optical signals corresponding to the clock signal. Furthermore, note that a given optical signal has a phase which is different than phases of the other optical signals.

Claims (27)

1. An integrated circuit, comprising:

a clock-generator circuit configured to provide a clock signal; and

an optical clock path coupled to the clock-generator circuit, wherein the optical clock path is configured to distribute optical signals corresponding to the clock signal, wherein the optical clock path is configured to optically set a skew value of one or more given optical signals by modifying at least one physical property of an optical waveguide in the optical clock path; and

wherein a given optical signal in the optical signals has a given phase which is different than phases of the other optical signals.

2. The integrated circuit of claim 1 , further comprising a receiver coupled to the optical clock path, wherein the optical signals facilitate oversampling of signals at the receiver.

3. The integrated circuit of claim 1 , further comprising a group of receivers coupled to the optical clock path, wherein the optical signals facilitate oversampling of signals at the group of receivers, and wherein a given receiver in the group of receiver is configured to be triggered using one or more of the optical signals.

4. The integrated circuit of claim 3 , further comprising a multiplexer between the optical clock path and the group of receivers.

5. The integrated circuit of claim 1 , wherein the optical signals are encoded using wavelength-division multiplexing.

6. The integrated circuit of claim 1 , wherein the skew value is non-zero.

7. The integrated circuit of claim 1 , wherein while setting the skew value the optical clock path is configured to dynamically adjust the skew value.

8. The integrated circuit of claim 7 , wherein the optical clock path is configured to dynamically adjust the skew value based on activity of the integrated circuit.

9. The integrated circuit of claim 7 , wherein the optical clock path is configured to dynamically adjust the skew value based on a level of a power-supply signal on the integrated circuit.

10. The integrated circuit of claim 1 , wherein the optical clock path includes an optical waveguide, and wherein the optical clock path is configured to set the skew value by modifying an index of refraction in the optical clock path.

11. The integrated circuit of claim 10 , wherein the optical clock path is configured to electrically modify the index of refraction by changing a number of charge carriers in the optical clock path, thereby changing a delay of the optical clock path.

12. The integrated circuit of claim 10 , wherein the optical clock path is configured to thermally modify the index of refraction in the optical clock path, thereby changing a delay of the optical clock path.

13. The integrated circuit of claim 1 , wherein the optical clock path is configured to set the skew value by passing the optical signal through a resonant cavity that provides a known amount of additional path delay.

14. The integrated circuit of claim 1 , wherein the clock generator is configured to provide multiple phases of the clock signal.

15. The integrated circuit of claim 1 , wherein the optical clock path is configured to generate the optical signals from the clock signal.

16. The integrated circuit of claim 1 , further comprising a conversion element coupled to the optical clock path, wherein the conversion element is configured to convert the optical signals into electrical signals.

17. The integrated circuit of claim 1 , where in the optical signals are encoded using time-division multiple access, frequency-division multiple access, or code-division multiple access.

18. An integrated circuit, comprising:

a clock-generator circuit configured to provide optical clock signals, wherein a given optical clock signal in the optical clock signals has a given phase which is different than phases of the other optical signals; and

an optical clock path coupled to the clock-generator circuit, wherein the optical clock path is configured to distribute the optical clock signals, wherein the optical clock path is configured to optically set a skew value of one or more given optical clock signals by modifying at least one physical property of an optical waveguide in the optical clock path.

19. A method for providing multiple clock signals on an integrated circuit, comprising:

generating a clock signal; and

distributing optical signals corresponding to the clock signal using an optical clock path on the integrated circuit, wherein a given optical signal in the optical signals has a given phase which is different than phases of the other optical signals;

wherein distributing the optical signals using the optical clock path involves optically setting a skew value of one or more given optical signals by modifying at least one physical property of an optical waveguide in the optical clock path.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037306/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2007
From: HO, RONALD; CUNNINGHAM, JOHN E.; KRISHNAMOORTHY, ASHOK V.; DROST, ROBERT J.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 019158/0225 →
Continuity (1)
Provisional Application 6078657400 · Mar 27, 2006