IP Library Granted Patent US 7,428,174
Granted Patent B2
US 7,428,174 · App. 11/736,129 · Granted Sep 23, 2008

Semiconductor flash memory

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,428,174
App. No.
11/736,129
Granted
Sep 23, 2008
Kind
B2
Abstract

A semiconductor flash memory includes an erase/write control unit that, when performing an erase/write operation of read memory cells, reads and senses memory current of the read memory cells for each memory cell, and adjusts threshold voltage of each of the read memory cells to a predetermined value, and a readout control unit that, when performing a read operation, selects at least two read memory cells simultaneously from among the read memory cells to which the erase/write control unit stored the same data, and senses total memory current for the at least two read memory cells.

Claims (7)

1. A semiconductor flash memory comprising:

a first readout control unit that, when performing a read operation of a plurality of read memory cells, selects at least two read memory cells, and senses total memory current for the at least two read memory cells;

a second readout control unit that selects one read memory cell, and senses memory current of the one read memory cell; and

an erase/write control unit that, when performing an erase/write operation of the read memory cells, reads and senses the memory current of the read memory cells for each of the memory cells, and adjusts threshold voltage of each of the read memory cells to a predetermined value, wherein

verify voltages for a first memory block formed by the at least two read memory cells selected by the first readout control unit and a second memory block formed by the read memory cells selected one-by-one by the second readout control unit are set to different values, and

the at least two memory cells in the first memory block store the same data.

2. The semiconductor flash memory according to claim 1 , wherein the erase/write control unit adjusts the threshold voltage of the at least two read memory cells so that a difference between a word line voltage that sets a write threshold lower limit and a read word line voltage is larger than a difference between a word line voltage that sets an erase threshold lower limit and an unselected word line voltage.

Assignments (1)
CHANGE OF NAME Recorded Sep 8, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024953/0211 →