IP Library Granted Patent US 7,996,658
Granted Patent B2
US 7,996,658 · App. 11/737,039 · Granted Aug 9, 2011

Processor system and method for monitoring performance of a selected task among a plurality of tasks

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Quick Facts
Patent No.
US 7,996,658
App. No.
11/737,039
Granted
Aug 9, 2011
Kind
B2
Abstract

A processor system includes a processor to execute a plurality of tasks by switching to one another, a task ID storage section to store a task ID to identify a task executed in the processor, an evaluation ID storage section to store an evaluation ID to be compared with an at least partial area of the task ID, a counter to measure a performance measurement value of a task executed in the processor, and a matching section to check a task ID stored in the task ID storage section against an evaluation ID stored in the evaluation ID storage section and operate the counter in accordance with a check result.

Claims (50)

1. A processor system comprising:

a processor which executes a plurality of tasks by switching to one another;

a first memory which stores a task ID identifying a task executed in the processor;

a second memory which stores an evaluation ID identifying a task of a measurement target;

a third memory which stores a mask value;

a matching unit coupled to the first, second and third memories; and

a counter which is coupled to the matching unit, and which counts in response to a signal output from the matching unit,

wherein the task ID and the evaluation ID include a task group ID, an individual ID and a resource field, respectively,

wherein the task group ID comprises an identifier indicating a collection of tasks, and specifies a task group to which the task corresponding to the task ID or the evaluation ID belongs,

wherein the individual ID distinguishes each task in the task group corresponding to the task ID or the evaluation ID,

wherein the resource field comprises an identifier indicating a particular hardware resource being used by the task corresponding to the task ID or the evaluation ID, and

wherein the matching unit determines each evaluation range of the task ID and the evaluation ID based on the mask value, and compares a portion of the task ID corresponding to the determined evaluation range with a portion of the evaluation ID corresponding to the determined evaluation range to generate the signal.

2. The processor system according to claim 1 , wherein the matching unit comprises:

a first evaluation range selector which receives the task ID and the mask value, and which determines the evaluation range of the task ID based on the mask value to generate the task ID including a masked portion indicating out of the evaluation range;

a second evaluation range selector which receives the evaluation ID and the mask value, and determines the evaluation range of the evaluation ID based on the mask value to generate the evaluation ID including a masked portion indicating out of the evaluation range; and

a comparator which compares the task ID including the masked portion with the evaluation ID including the masked portion to generate the signal.

3. The processor system according to claim 1 ,

wherein the mask value comprises a value indicating that an evaluation target includes the group ID, and

wherein the matching unit compares the group ID of the task ID with the group ID of the evaluation ID to generate the signal.

4. The processor system according to claim 1 ,

wherein the mask value comprises a value indicating that an evaluation target includes the individual ID, and

wherein the matching unit compares the individual ID of the task ID with the individual ID of the evaluation ID to generate the signal.

5. The processor system according to claim 1 ,

wherein the mask value comprises a first value indicating that an evaluation target includes the resource field, and

wherein the matching unit compares at least a portion of the resource field of the task ID with a portion of the resource field of the evaluation ID to generate the signal.

6. The processor system according to claim 1 ,

wherein the task executed in the processor comprises a common task, the common task being commonly called from a plurality of tasks which belong to different task groups, and

wherein, if the common task is executed in the processor, the first memory stores the task ID including the task group ID of a task which is a caller of the common task as the task group ID of the common task.

7. A processor system comprising:

a processor which executes a plurality of tasks by switching to one another;

a first memory which stores a task ID identifying a task executed in the processor, the task ID including a first task collection information indicating a collection of tasks to which the task executed in the processor belongs;

a second memory which stores an evaluation ID identifying a task of a measurement target, the evaluation ID including a second task collection information indicating a collection of tasks to which the task of a measurement target belongs;

a third memory which stores a mask value;

a matching unit which receives the task ID, the evaluation ID and the mask value, and which compares at least a portion of the first task collection information with a portion of the second task collection information based on the mask value to generate a signal; and

a counter which counts in response to the signal.

8. The processor system according to claim 7 ,

wherein the matching unit comprises:

a first selector which receives the first task collection information and the mask value to specify the portion of the first task collection information to be compared with the portion of the second task collection information based on the mask value;

a second selector which receives the second task collection information and the mask value to specify the portion of the second task collection information to be compared with the portion of the first task collection information based on the mask value; and

a comparator which compares the portion of the first task collection information specified by the first selector with the portion of the second task collection information specified by the second selector to output the signal.

9. The processor system according to claim 7 ,

wherein the task ID further includes a first individual ID information distinguishing each task in the collection of the tasks to which the task executed in the processor belongs,

wherein the evaluation ID further includes a second individual ID information distinguishing each task in the collection of the tasks to which the task of the measurement ta•get belongs, and

wherein the matching unit comprises:

a first selector which receives the task ID and the mask value to select one of the first task collection information and the first individual ID based on the mask value;

a second selector which receives the task ID and mask value to select one of the second task collection information and the second individual ID based on the mask value; and

a comparator which compares the portion of the first task collection information with the portion of the second task collection information or compares the first individual ID with the second individual ID based on results of selecting in the first and second selectors.

10. The processor system according to claim 9 ,

wherein, if the first task collection information is selected, the first selector specifies the portion of the first task collection information based on the mask value, and

wherein, if the second task collection information is selected, the second selector specifies the portion of the second task collection information based on the mask value.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2007
From: NAGAO, TSUYOSHI; SUZUKI, HITOSHI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 019178/0483 →