Active area bonding compatible high current structures
View Patent ↗A method of forming a semiconductor structure is provided. One method comprises forming a device region between a substrate and a bond pad. Patterning a conductor between the bond pad and the device region with gaps. Filling the gaps with insulation material that is harder than the conductor to form pillars of relatively hard material that extend through the conductor and forming an insulation layer of the insulation material between the conductor and the bond pad.
1. A method of forming a semiconductor structure, the method comprising:
forming a plurality of intermediate metal layers between a top metal layer and a substrate;
forming at least one active device in the substrate;
forming a bond pad on the top metal layer, wherein the at least one active device is located directly under the bond pad;
forming a plurality of insulation layers, the insulation layers separating the plurality of intermediate metal layers, one of the insulation layers located between the top metal layer and the closest intermediate metal layer to the top metal layer having a thickness selected to resist cracking; and
forming a sub-layer of the top metal layer, the material of the sub-layer being relatively stiff compared to the rest of the top metal layer.
2. The method of claim 1 , wherein the insulation layer located between the top metal layer and the closest intermediate metal layer to the top metal layer having a thickness selected to resist cracking is relatively thicker than the remaining insulation layers.
3. The method of claim 1 , wherein the insulation layer located between the top metal layer and the closest intermediate metal layer to the top metal layer having a thickness selected to resist cracking has a thickness of at least 1.5 μm.
4. The method of claim 1 , further comprising:
forming a conductor directly under the bond pad, the conductor formed from the intermediate metal layer that is closest to the top metal layer;
patterning the conductor with gaps; and
filling the gaps with insulation material that is relatively hard as compared to the conductor.
5. The method of claim 4 , further comprising:
patterning the gaps to extend in a direction of current flow through the conductor.
6. The method of claim 1 , wherein the sub-layer is formed from one of TiN, SiN and TiW.
7. A method of forming a semiconductor structure, the method comprising:
forming a plurality of intermediate metal layers between a top metal layer and a substrate;
forming at least one active device in the substrate;
forming a bond pad on the top metal layer, wherein the at least one active device is located directly under the bond pad;
forming a plurality of insulation layers, the plurality of insulation layers separating the plurality of intermediate metal layers;
forming a conductor directly under the bond pad, the conductor formed from the intermediate metal layer that is closest to the top metal layer;
patterning the conductor with gaps; and
patterning the gaps in the conductor to extend in a direction of current flow through the conductor.
8. The method of claim 7 , wherein one of the insulation layers between the top metal layer and the closest intermediate metal layer to the top metal layer has a thickness selected to resist cracking
9. The method of claim 8 , wherein the insulation layer between the top metal layer and the closest intermediate metal layer to the top metal layer having a thickness selected to resist cracking is relatively thicker than the remaining insulation layers.
10. The method of claim 7 , further comprising filling the gaps in the conductor with insulation material that is relatively hard as compared to the conductor.
11. The method of claim 7 , wherein the top metal layer includes a sub-layer of relatively stiff material, the sub-layer being relatively stiff compared to the rest of the top metal layer.