Systems for providing an automobile electronic transmission control monitoring unit with a latchdown mechanism
View Patent ↗The present disclosure provides systems for microprocessors to control a transmission power relay output with a latchdown mechanism in the event that either microprocessor decides it is appropriate to de-energize the relay. Advantageously, the present disclosure allows, for example, the transmission control to be performed by an existing dual microprocessor configuration instead of a custom-designed application specific integrated circuit (ASIC). The microprocessor-based software is more easily updated or changed to add functionality. Further, the present disclosure minimizes unique development with respect to electronic transmission control with a less complex design.
1. A transmission power relay output circuit with a latchdown mechanism for automotive use, comprising:
a power supply integrated circuit connected to a power source, a first microprocessor, and a second microprocessor;
a communications link for exchanging watchdog messages between the first and second microprocessors;
a high side driver comprising an input from the first and second microprocessors, and an output coupled to a transmission relay; and
a latchdown circuit connected to the power supply integrated circuit, the first and second microprocessors, and the high side driver, wherein the latchdown circuit comprises a plurality of discrete components;
wherein the first and second microprocessors and the latchdown circuit are configured to control the transmission relay in the event that one of the first and second microprocessors decides it is appropriate to de-energize the relay.
2. The transmission power relay output circuit of claim 1 , wherein the communications link comprises a Serial Peripheral Interface Bus.
3. The transmission power relay output circuit of claim 1 , wherein the first and second microprocessors reset one another and itself responsive to a software algorithm that contains third level protection functions.
4. The transmission power relay output circuit of claim 1 , wherein the first microprocessor comprises a 68HC08 and the second microprocessor comprises a Copperhead (CuHD).
5. The transmission power relay output circuit of claim 4 , wherein the Copperhead microprocessor detects an ignition key turn on and initiates a high side driver turn on routine accordingly.
6. The transmission power relay output circuit of claim 1 , wherein the transmission relay is de-energized responsive to a fault condition comprising one of when the first or second microprocessors stops sending a proper watchdog signal/message, and the latchdown circuit prevents re-energization of the relay until the next key on sequence.
7. The transmission power relay output circuit of claim 6 , wherein once the transmission relay has been de-energized from one of the fault conditions, the relay is not reactivated until the ignition key is cycled through lock back to on even if the first or second microprocessor gets reset.
8. The transmission power relay output circuit of claim 7 , wherein the transmission relay is energized as long as the first microprocessor maintains an enable output, no latchdown signal is present, and the second microprocessor maintains a disabled output low.
9. The transmission power relay output circuit of claim 1 , wherein the first and second microprocessors are configured to perform a test by resetting, and wherein the resetting is performed fast enough that the relay remains energized.
10. A first and second microprocessor configured to control a transmission power relay output circuit with a latchdown mechanism for automotive use, comprising:
a Serial Peripheral Interface Bus communications link between the first and second microprocessors;
a high side driver comprising an input from the first and second microprocessors, and an output coupled to a transmission relay; and
a latchdown circuit connected to a power supply integrated circuit, the first and second microprocessors, and the high side driver, wherein the latchdown circuit comprising a plurality Of discrete components;
wherein the Serial Peripheral Interface Bus communications link allows the first and second microprocessors to reset one another and itself responsive to whether the first and second microprocessors are operating properly, wherein the first and second microprocessors reset one another and itself responsive to a software algorithm that contains third level protection functions;
wherein the first and second microprocessors and the latchdown circuit are configured to control a transmission relay in the event that one of the first and second microprocessors decides it is appropriate to de-energize the relay.
11. The first and second microprocessor of claim 10 , wherein the first microprocessor comprises a 68HC08 and the second microprocessor comprises a Copperhead (CuHD).
12. The first and second microprocessor of claim 11 , wherein the Copperhead microprocessor detects an ignition key turn on and initiates a high side driver turn on routine accordingly.
13. The first and second microprocessor of claim 11 , wherein the transmission relay is de-energized responsive to a fault condition comprising one of when the first or second microprocessors stops sending a proper watchdog signal/message, and the latchdown circuit prevents re-energization of the relay until the next key on sequence.
14. The first and second microprocessor of claim 13 , wherein once the transmission relay has been de-energized from one of the fault conditions, the relay is not reactivated until the ignition key is cycled through lock back to on even if the first or second microprocessor gets reset.
15. The first and second microprocessor of claim 14 , wherein the transmission relay is energized as long as the first microprocessor maintains an enable output, no latchdown signal is present, and the second microprocessor maintains a disabled output low.
16. The first and second microprocessor of claim 10 , wherein the first and second microprocessors are configured to perform a test by resetting, and wherein the resetting is performed fast enough that the relay remains energized.