Methods and systems for using type models to generate an implementation of a type

1. A method for using data type analysis to generate an implementation of a data type, the method comprising:

identifying a request to generate a first implementation of a data type;

receiving a type model associated with the data type;

identifying a second implementation of the type model as suitable for a high-performance implementation;

generating the second implementation on a target processor; and

representing the second implementation as the first implementation.

2. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying a second implementation of the type model as suitable for a high-performance implementation, responsive to an analysis of the type model.

3. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation comprises modifying the type model.

4. The method of claim 3 , wherein generating the second implementation on a target processor comprises generating an implementation of the modified type model.

5. The method of claim 1 , wherein receiving a type model associated with the type further comprises receiving the type model from a system for type analysis.

6. The method of claim 1 , wherein receiving a type model associated with the type further comprises receiving the type model from a user.

7. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving the type model from a programmer via an applications programming interface.

8. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a type model associated with a data type.

9. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a type model associated with a function type.

10. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a type model associated with a type replacing a basic type provided by a programming language.

11. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a type model associated with a composite type comprising a plurality of basic types.

12. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a type model associated with a composite type comprising a plurality of types replacing basic types.

13. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a type model associated with a type, the type associated with an interface.

14. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a type model associated with a type, the type associated with at least one operation.

15. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a description of a sequence of instructions used to implement an operation associated with the type.

16. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a description of a data layout of an implementation of the type.

17. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a description of a relationship between an implementation of the type model and a non-local variable.

18. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving a type model representing a data layout of an implementation of the type and representing an operation associated with an implementation of the type.

19. The method of claim 18 , wherein receiving a type model associated with the data type further comprises receiving a type model representing a data layout of an implementation of the type and representing an arithmetic operation associated with an implementation of the type.

20. The method of claim 18 , wherein receiving a type model associated with the data type further comprises receiving a type model representing a data layout of an implementation of the type and representing a logical operation associated with an implementation of the type.

21. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving an identification of a type model, the type model including an identifier of at least one basic type.

22. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving an identification of a type model, the type model including an identifier of a composite type comprising a plurality of basic types.

23. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving an identification of a type model, the type model including an identifier of a composite type comprising a plurality of replacement types.

24. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving an identifier of a state field comprising a plurality of values, one of the plurality of values associated with an implementation of the type model.

25. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving an identifier of an operation associated with an implementation of the type model.

26. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving an identification of a type model, the type model generated responsive to an analysis of the type.

27. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving, from a constructor, the identification of the type model.

28. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving, from a type analysis system, the identification of the type model.

29. The method of claim 1 , wherein receiving a type model associated with the data type further comprises receiving, by a compiler, the identification of the type model.

30. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying, by a type translation component, a second implementation of the type model as suitable for a high-performance implementation.

31. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying a second implementation of the type model, the second implementation having a data layout satisfying a requirement of a target processor.

32. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying a second implementation of the type model, the second implementation having a data layout satisfying an alignment requirement of a target processor.

33. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying a second implementation of the type model, the second implementation having a data layout satisfying a padding requirement of a target processor.

34. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying a second implementation of the type model, the second implementation having a data layout avoiding a cache conflict on the target processor.

35. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying a second implementation of the type model, the second implementation having a data layout optimizing data transfer rates on the target processor.

36. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying a second implementation of the type model, the second implementation having a data layout that uses compression to minimize storage space.

37. The method of claim 1 , wherein identifying a second implementation of the type model as suitable for a high-performance implementation further comprises identifying a second implementation of the type model, the second implementation having a data layout that adapts the data to the byte order of the target processor.

38. The method of claim 1 , wherein representing the second implementation as the first implementation further comprises:

identifying a first interface associated with the type model; and

associating a second interface with the second implementation, the second interface substantially similar to the first interface.

39. The method of claim 38 further comprising providing a translation mechanism for translating input to the first interface into a format accepted by the second interface.

40. The method of claim 38 further comprising providing a translation mechanism for translating output from the second interface into a format accepted by the first interface.

41. A system for using type analysis to generate an implementation of a type comprising:

a storage device;

a generator coupled with the storage device, the generator comprising at least:

a type translator identifying a request to generate a first implementation of a type, analyzing a type model associated with the type, and identifying a second type model as suitable for a high-performance implementation, the type model including a description of a data layout of an implementation of the type; and

a code generator generating an implementation of the second type model on a target processor and representing the generated implementation as the first implementation.

42. The system of claim 41 , wherein the type translator is in communication with a type analysis system generating the type model.

43. The system of claim 41 , wherein the type translator further comprises a means for receiving the type model from a user.

44. The system of claim 41 , wherein the type translator further comprises a means for receiving the type model from a programmer via an applications programming interface.

45. The system of claim 41 , wherein the type translator comprises a means for modifying the type model.

46. The system of claim 45 , wherein the code generator comprises a means for generating an implementation of the modified type model.

47. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model associated with a data type.

48. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model associated with a function type.

49. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model associated with a type replacing a basic type provided by a programming language.

50. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model associated with a composite type comprising a plurality of basic types.

51. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model associated with a composite type comprising a plurality of types replacing basic types.

52. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model of the type, the type model including a description of at least one operation associated with the type.

53. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model of the type, the type model including a description of an arithmetic operation associated with an implementation of the type.

54. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model of the type, the type model including a description of a logical operation associated with an implementation of the type.

55. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model associated with a type, the type associated with an interface.

56. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model associated with a type, the type associated with at least one operation.

57. The system of claim 41 , wherein the type translator further comprises a means for generating a description of a sequence of instructions used to implement an operation associated with the type.

58. The system of claim 41 , wherein the type translator further comprises a means for generating a description of a data layout of an implementation of the type.

59. The system of claim 41 , wherein the type translator further comprises a means for generating a description of a relationship between an implementation of the type model and a non-local variable.

60. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model representing a data layout of an implementation of the type and representing an operation associated with an implementation of the type.

61. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model, the type model including an identifier of at least one basic type.

62. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model, the type model including an identifier of a composite type comprising a plurality of basic types.

63. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model including an identifier of a state field comprising a plurality of values, one of the plurality of values associated with an implementation of the type model.

64. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model including an identifier of an operation associated with an implementation of the type model.

65. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model, the type model generated responsive to an analysis of the type.

66. The system of claim 41 , wherein the type translator further comprises a receiver retrieving the type model from the storage device.

67. The system of claim 41 , wherein the type translator further comprises a means for identifying a second implementation of the type model, the second implementation having a data layout satisfying a requirement of a target processor.

68. The system of claim 41 , wherein the type translator further comprises a means for identifying a second implementation of the type model, the second implementation having a data layout satisfying an alignment requirement of a target processor.

69. The system of claim 41 , wherein the type translator further comprises a means for identifying a second implementation of the type model, the second implementation having a data layout satisfying a padding requirement of a target processor.

70. The system of claim 41 , wherein the type translator further comprises a means for identifying a second implementation of the type model, the second implementation having a data layout avoiding a cache conflict on the target processor.

71. The system of claim 41 , wherein the type translator further comprises a means for identifying a second implementation of the type model, the second implementation having a data layout optimizing data transfer rates on the target processor.

72. The system of claim 41 , wherein the type translator further comprises a means for identifying a second implementation of the type model, the second implementation having a data layout that uses compression to minimize storage space.

73. The system of claim 41 , wherein the type translator further comprises a means for identifying a second implementation of the type model, the second implementation having a data layout that adapts the data to the byte order of the target processor.

74. The system of claim 41 , wherein the type translator further comprises a means for identifying a second type model of the type.

75. The system of claim 41 , wherein the type translator further comprises a means for identifying a type model of a second type.

76. The system of claim 41 , wherein the code generator further comprises: a means for identifying a first interface associated with the type model; and a means for associating a second interface with the second implementation, the second interface substantially similar to the first interface.

77. The system of claim 76 further comprising a translation mechanism translating input to the first interface into a format accepted by the second interface.

78. The system of claim 76 further comprising a translation mechanism translating output from the second interface into a format accepted by the first interface.

79. The system of claim 41 , wherein the code generator further comprises a means for generating the implementation of the second type model on a parallel processor.

80. The system of claim 41 , wherein the code generator for generating the second type of data structure on a target processor further comprises a means for dynamically generating the implementation of the second type model.

81. The system of claim 41 , wherein the code generator further comprises a means for dynamically generating the implementation of the second type model during compilation of the instruction.

82. The system of claim 41 , wherein the code generator further comprises a runtime system interacting with the implementation of the second type model on the target processor and representing the generated implementation as the first implementation.

83. The system of claim 41 , wherein the code generator generates an implementation of the second type model optimized for a parallel computer.

84. The system of claim 41 , wherein the code generator generates an implementation of the second type model optimized for a graphics processor.

85. The system of claim 41 , wherein the code generator generates an implementation of the second type model optimized for a multi-core processor.

86. The system of claim 41 , wherein the code generator generates an implementation of the second type model optimized for a digital signal processor.

87. The system of claim 41 , wherein the code generator generates an implementation of the second type model optimized for a field-programmable gate array.

88. The system of claim 41 , wherein the code generator generates an implementation of the second type model optimized for reconfigurable logic.