IP Library Granted Patent US 7,890,846
Granted Patent B2
US 7,890,846 · App. 11/739,613 · Granted Feb 15, 2011

Electronic data flash card with Reed Solomon error detection and correction capability

Assignee: SuperTalent Electronics, Inc.
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Quick Facts
Patent No.
US 7,890,846
App. No.
11/739,613
Granted
Feb 15, 2011
Kind
B2
Abstract

One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The syndrome calculator generates a syndrome for each of the data sections. The decoder further includes a root finder block responsive to the calculated syndrome and for generating at least two roots, a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies, and an error symbol values calculator block coupled to the root finder and the polynomial calculator block and for generating a second error address, identifying a second location in the data wherein the error(s) lie.

Claims (566)

1. A electronic data storage card comprising:

a Reed Solomon (RS) decoder including,

a syndrome calculator block responsive to a page of information, the page including data and overhead, the data being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections, the syndrome calculator operative to generate a syndrome for each of the data sections;

a root finder block coupled to receive the calculated syndrome and operative to generate at least two roots;

a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies; and

an error symbol values calculator block coupled to the root finder and to the polynomial calculator block and operative to generate a second error address, identifying a second location in the data wherein the error(s) lie,

wherein two errors are included in the page of information and assuming i 1 , i 2 are two error locations in the data and Y1, Y2 are two error symbol values, the syndrome calculator block for generating four syndromes, S0, S1, S2 and S3, each corresponding to a section of the page of information in accordance with the following equations:

S

0

=

Y

1

*

X

1

0

+

Y

2

*

X

2

0

=

Y

1

+

Y

2

0

S

1

=

Y

1

*

X

1

1

+

Y

2

*

X

2

1

=

Y

1

*

X

1

+

Y

2

*

X

2

0

;

S

2

=

Y

1

*

X

1

2

+

Y

2

*

X

2

2

0

=

S

1

*

σ

1

+

S

0

*

σ

0

;

and

S

3

=

Y

1

*

X

1

3

+

Y

2

*

X

2

3

0

=

S

2

*

σ

1

+

S

2

*

σ

0

wherein

,

σ0 and σ1 are each an error location polynomial.

2. An electronic data storage card, as recited in claim 1 , wherein the RS decoder for correcting up to at least two bytes of error in one page, each page being 512bytes of data area and 16 bytes of spare area wherein the plurality of data sections is three.

3. An electronic data storage card, as recited in claim 1 , wherein the root finder block generates the at least two roots, Z 1 and Z 2 , based upon a Galois Field (GF) ( 2 8 ) calculation.

4. An electronic data storage card, as recited in claim 1 , wherein the root finder block generates roots based upon the following equation:

Z 2 + Z +K = 0.

5. An electronic data storage card, as recited in claim 3 , wherein the root finder includes comparison logic for generating the at least two roots.

6. An electronic data storage card, as recited in claim 3 , wherein the comparison logic is made of a plurality of XOR.

7. An electronic data storage card, as recited in claim 1 , wherein the syndrome calculator includes combinatorial shift and comparison logic for generating each syndrome.

8. An electronic data storage card, as recited in claim 1 , for implementing the equation: r(x)=c(x)+e(x), assuming r(x) is the receiving polynomial, c(x) is the correct code word polynomial, and e(x) is error polynomial.

9. A electronic data storage card comprising:

a Reed Solomon (RS) decoder including,

a syndrome calculator block responsive to a page of information, a page being two kilo bytes in size, the page including data and overhead, the data being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections, the syndrome calculator operative to generate a syndrome for each of the data sections;

a root finder block coupled to receive the calculated syndrome and operative to generate at least two roots, wherein the root finder block generates the at least two roots, Z 1 and Z 2 , based upon a Galois Field (GF) ( 2 9 ) calculation;

a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies; and

an error symbol values calculator block coupled to the root finder and to the polynomial calculator block and operative to generate a second error address, identifying a second location in the data wherein the error(s) lie,

wherein assuming i 1 , i 2 are two error locations in the data and Y1, Y2 are two error symbol values, the syndrome calculator block being operative to generate four syndromes, S0, S1, S2 and S3, each syndrome corresponding to a section of the page of information in accordance with the following equations:

S

0

=

Y

1

*

X

1

0

+

Y

2

*

X

2

0

=

Y

1

+

Y

2

0

S

1

=

Y

1

*

X

1

1

+

Y

2

*

X

2

1

=

Y

1

*

X

1

+

Y

2

*

X

2

0

;

S

2

=

Y

1

*

X

1

2

+

Y

2

*

X

2

2

0

=

S

1

*

σ

1

+

S

0

*

σ

0

;

and

S

3

=

Y

1

*

X

1

3

+

Y

2

*

X

2

3

0

=

S

2

*

σ

1

+

S

1

*

σ

0

wherein

,

σ0 and σ1 are each an error location polynomial.

10. An electronic data storage card, as recited in claim 9 , wherein the root finder block generates the at least two roots, Z 1 and Z 2 , based upon a Galois Field (GF) ( 2 8 ) calculation.

11. An electronic data storage card, as recited in claim 9 , wherein the root finder block generates roots based upon the following equation:

Z 2 + Z +K = 0.

12. An electronic data storage card, as recited in claim 11 , wherein the root finder includes comparison logic for generating the at least two roots.

13. An electronic data storage card, as recited in claim 11 , wherein the comparison logic is made of a plurality of XOR.

14. An electronic data storage card, as recited in claim 9 , wherein the syndrome calculator includes combinatorial shift and comparison logic for generating each syndrome.

15. A method of detecting and correcting errors employed in a electronic data storage card comprising:

Receiving a page of information including data and overhead, the data being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections;

calculating a syndrome for each of the data sections based on a GF( 2 8 ) codeword;

receiving the calculated syndromes;

generating at least two roots;

generating at least one error address, identifying a location in the data wherein the error lies;

generating a second error address, identifying a second location in the data wherein the error(s) lie; and

assuming i 1 , i 2 are the error address and the second error address, respectively, and Y1, Y2 are two error symbol values, generating four syndromes, S0, S1, S2 and S3, each syndrome corresponding to a section of the page of information in accordance with the following equations:

S

0

=

Y

1

*

X

1

0

+

Y

2

*

X

2

0

=

Y

1

+

Y

2

0

S

1

=

Y

1

*

X

1

1

+

Y

2

*

X

2

1

=

Y

1

*

X

1

+

Y

2

*

X

2

0

;

S

2

=

Y

1

*

X

1

2

+

Y

2

*

X

2

2

0

=

S

1

*

σ

1

+

S

0

*

σ

0

;

and

S

3

=

Y

1

*

X

1

3

+

Y

2

*

X

2

3

0

=

S

2

*

σ

1

+

S

1

*

σ

0

wherein

,

σ0 and σ1 are each an error location polynomial.

16. A method of detecting and correcting errors employed in a electronic data storage card comprising:

Receiving a page of information including data and overhead, the data being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections;

calculating a syndrome for each of the data sections based on a GF( 2 9 ) codeword;

receiving the calculated syndromes;

generating at least two roots;

generating at least one error address, identifying a location in the data wherein the error lies;

generating a second error address, identifying a second location in the data wherein the error(s) lie, and

assuming i 1 , i 2 are the error address and the second error address, respectively, and Y1, Y2 are two error symbol values, generating four syndromes, S0, S1, S2 and S3, each syndrome corresponding to a section of the page of information in accordance with the following equations:

S

0

=

Y

1

*

X

1

0

+

Y

2

*

X

2

0

=

Y

1

+

Y

2

0

S

1

=

Y

1

*

X

1

1

+

Y

2

*

X

2

1

=

Y

1

*

X

1

+

Y

2

*

X

2

0

;

S

2

=

Y

1

*

X

1

2

+

Y

2

*

X

2

2

0

=

S

1

*

σ

1

+

S

0

*

σ

0

;

and

S

3

=

Y

1

*

X

1

3

+

Y

2

*

X

2

3

0

=

S

2

*

σ

1

+

S

1

*

σ

0

wherein

,

σ0 and σ1 are each an error location polynomial.

17. An electronic data storage card, as recited in claim 1 , for implementing the equation: r(x)=c(x)+e(x), assuming r(x) is the receiving polynomial, c(x) is the correct code word polynomial, and e(x) is error polynomial.

Assignments (2)
CHANGE OF NAME Recorded Mar 27, 2014
From: SUPER TALENT ELECTRONIC, INC.
To: SUPER TALENT TECHNOLOGY, CORP.
Reel/Frame 032540/0565 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2007
From: LEE, CHARLES C.; YU, I-KANG; MA, ABRAHAM C.; SHEN, MING-SHIANG
To: SUPER TALENT ELECTRONICS, INC.
Reel/Frame 019205/0154 →
Continuity (5)
Continuation In Part 11657243 · Jan 24, 2007
Continuation In Part 10799039 · Mar 11, 2004
Continuation In Part 10789333 · Feb 26, 2004
Continuation In Part 09478720 · Jan 6, 2000
Related Publication 20070204206A1 · Aug 30, 2007