Granted Patent B2

US 7,511,578 · App. 11/746,006 · Granted Mar 31, 2009

Abstract

Claims (31)

1. An RF power amplifier formed on an integrated circuit comprising:

a first amplifier having at least one switching device;

a second amplifier having at least one switching device, the first and second power amplifiers coupled differentially to drive a load; and

wherein a first switching device in the first amplifier is electrically isolated from a second switching device in the second amplifier.

2. The RF power amplifier of claim 1 , wherein the first and second amplifiers are configured in a stacked configuration.

3. The RF power amplifier of claim 1 , wherein the first and second switching devices are electrically isolated by isolating the bodies of the first and second switching devices.

4. The RF power amplifier of claim 3 , wherein the bodies of the first and second switching devices are isolated by forming at least part of one of the switching devices in a deep N-well.

5. The RF power amplifier of claim 4 , wherein a bias voltage is applied to the deep N-well.

6. The RF power amplifier of claim 3 , wherein the bodies of the first and second switching devices are isolated using silicon on isolator technology.

7. The RF power amplifier of claim 1 , wherein the first and second switching devices are isolated by forming the integrated circuit using N − starting material.

8. The RF power amplifier of claim 1 , further comprising a third power amplifier formed on the integrated circuit, the third power amplifier having a third switching device, wherein the first, second and third switching devices are electrically isolated from each other.

9. The RF power amplifier of claim 1 , wherein the integrated circuit is implemented using CMOS technology.

10. A method of amplifying RF signals comprising:

providing an integrated circuit;

using a first switching device to form a first amplifier;

using a second switching device to form a second amplifier;

coupling the first and second amplifiers differentially to drive a load; and

electrically isolating the first switching device with the second switching device.

11. The method of claim 10 , wherein electrically isolating the first switching device with the second switching device comprises isolating a body of the first switching device from a body of the second switching device.

12. The method of claim 11 , further comprising forming a deep N-well in the integrated circuit.

13. The method of claim 12 , wherein the second switching device is formed using the deep N-well to provide isolation from the first switching device.

14. The method of claim 13 , further comprising applying a bias voltage to the deep N-well.

15. The method of claim 11 , further comprising using silicon on isolator technology for isolating the body of the first switching device from the body of the second switching device.

16. The method of claim 11 , further comprising forming a deep N-well on the integrated circuit for isolating the first switching device from the second switching device.

17. The method claim 10 , wherein the integrated circuit is implemented using CMOS technology.

18. The method claim 10 , further comprising configuring the first and second amplifiers in a stacked arrangement.

19. A stacked RF power amplifier formed on an integrated circuit comprising:

a deep N-well formed using the integrated circuit;

first and second amplifiers formed using the integrated circuit; and

wherein at least one circuit element of the first amplifier is electrically isolated from at least one circuit element of the second amplifier using the deep N-well.

20. The stacked RF power amplifier of claim 19 , wherein the first amplifier has a first switching device, wherein the second amplifier has a second switching device, and wherein the second switching device is at least partially formed in the deep N-well.

Assignments (6)