System and method of transmission and reception of progressive content with isolated fields for conversion to interlaced display
View Patent ↗Systems and methods of coding progressive content with isolated fields for conversion to interlaced display are provided. Some systems and methods may find use in, for example, digital video compression systems and methods. Film material may be encoded as video material with an intended field polarity and an explicit 3:2 pull-down operation for interlaced display (e.g., a 30-frames-per-second display).
1. A video decoder circuit comprising:
circuitry operable to decode encoded film material that has been encoded with a field polarity and a 3:2 pull-down operation, where the encoded film material comprises inserted isolated fields; and
wherein the circuitry is operable to decode the encoded film material and to present a video sequence without using a film mode flag.
2. The video decoder of claim 1 , where the encoded film material comprises film mode flags.
3. The video decoder circuit of claim 1 , wherein the circuitry is operable to decode the encoded film material comprising top_field_first and repeat_first_field flags and to present a video sequence without using the top_field_first and repeat_first_field flags.
4. The video decoder circuit of claim 1 , wherein the circuitry is operable to determine a decoding timestamp for a particular picture without knowledge of a film mode state of the particular picture.
5. The video decoder circuit of claim 1 , wherein the circuitry is operable to determine a presentation timestamp for a particular picture without knowledge of a film mode state of the particular picture.
6. The video decoder circuit of claim 1 , wherein the circuitry is operable to determine field polarities of encoded frames based on polarities of the inserted isolated fields.
7. The video decoder circuit of claim 1 , wherein the circuitry is operable to determine field polarities of encoded frames based solely on polarities of the inserted isolated fields.
8. The video decoder circuit of claim 1 , where the encoded film material comprises coded frames and inserted isolated coded fields.
9. The video decoder circuit of claim 1 , wherein the presented video sequence is for interlaced display.
10. A video decoder circuit comprising:
circuitry operable to decode first encoded film material that has been encoded with a field polarity and a 3:2 pull-down operation, where the first encoded film material comprises inserted isolated fields;
wherein the circuitry is operable to decode second encoded film material that has not been encoded with a field polarity and a 3:2 pull-down operation; and
wherein the circuitry is operable to decode the first encoded film material and the second encoded film material at a frame rate and buffer removal times that are consistent between the first encoded film material and the second encoded film material.
11. The video decoder circuit of claim 10 , wherein the circuitry is operable to determine a decoding timestamp for a particular picture of the first encoded film material without knowledge of a film mode state of the particular picture.
12. The video decoder circuit of claim 10 , wherein the circuitry is operable to determine a presentation timestamp for a particular picture of the first encoded film material without knowledge of a film mode state of the particular picture.
13. The video decoder circuit of claim 10 , wherein the circuitry is operable to determine field polarities of encoded frames of the first encoded film material based on the polarities of the inserted isolated fields.
14. The video decoder circuit of claim 10 , wherein the circuitry is operable to determine field polarities of encoded frames of the first encoded film material based solely on the polarities of the inserted isolated fields.
15. The video decoder circuit of claim 10 , wherein the circuitry is operable to derive timestamp information from presentation times of previous pictures of the first encoded film material and only the frame or the field rate indicated in the stream.
16. The video decoder circuit of claim 10 , where the first encoded film material comprises coded frames and inserted isolated coded fields.
17. A video decoder circuit comprising:
circuitry operable to decode encoded film material that has been encoded with a field polarity and a 3:2 pull-down operation, where the encoded film material comprises inserted isolated fields; and
wherein the circuitry is operable to derive timestamp information from presentation times of previous pictures and a frame rate or a field rate indicated in a video stream.
18. The video decoder circuit of claim 17 , wherein the circuitry is operable to derive timestamp information solely from presentation times of previous pictures and a frame rate or a field rate indicated in a video stream.
19. The video decoder circuit of claim 17 , wherein the circuitry is operable to determine a decoding time or a presentation time for a particular picture based upon at least one decoding time stamp (DTS) or at least one presentation time stamp (PTS) for a previously decoded picture.
20. The video decoder circuit of claim 17 , wherein the circuitry is operable to determine a decoding timestamp for a particular picture of the encoded film material without knowledge of a film mode state of the particular picture.
21. The video decoder circuit of claim 17 , wherein the circuitry is operable to determine a presentation timestamp for a particular picture of the encoded film material without knowledge of a film mode state of the particular picture.
22. The video decoder circuit of claim 17 , wherein the encoded film material comprises a repeat-field flag, and the circuitry is operable to derive decoding and presentation times without using the repeat-field flag.
23. The video decoder circuit of claim 17 , where the encoded film material comprises coded frames and inserted isolated coded fields.
24. The video decoder circuit of claim 17 , wherein the decoded film material is for interlaced display.