IP Library Granted Patent US 7,830,924
Granted Patent B2
US 7,830,924 · App. 11/754,425 · Granted Nov 9, 2010

Stuffing and destuffing operations when mapping low-order client signals into high-order transmission frames

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Quick Facts
Patent No.
US 7,830,924
App. No.
11/754,425
Granted
Nov 9, 2010
Kind
B2
Abstract

A unit timing signal synchronized with a high-order transmission frame is used for measuring a difference between the number of data pieces of a client signal mapped to the high-frequency frame and the number of data pieces of the output client signal by integrating the difference therebetween for each unit timing signal. Then stuffing and de-stuffing operations are performed so that a integration result is zero.

Claims (22)

1. Transmitting equipment for receiving a first client signal, speed converting the first client signal to generate a second client signal, and transmitting a high-order transmission frame including the second client signal, the transmitting equipment comprising:

a clock data recovery (CDR) part for extracting a clock signal from the first client signal;

a frequency divider for frequency dividing the extracted clock signal, wherein the frequency divider divides the extracted clock signal to a frequency within a frequency range suitable for a counting operation by a received data number count part that counts the number of data pieces of the first client signal received within a unit time;

a transmitted data number selection part for selecting and outputting a value representing the number of data pieces of the second client signal transmitted to the high-order transmission frame within the unit time;

an integration counter for integrating a difference between outputs of the received data number count part and of the transmitted data number selection part for each unit time;

a stuff determination part for making stuff determination when the output of the integration counter exceeds a threshold,

wherein the stuff determination part performs stuffing insertion so that the output of the integration counter approaches zero on a time average basis;

a first multiplier for multiplying the output of the received data number count part by a first coefficient; and

a second multiplier for multiplying the output of the transmitted data number selection part by a second coefficient,

wherein the integration counter integrates a difference between outputs of the first multiplier and the second multiplier for each unit time.

2. Receiving equipment for receiving a high-order transmission frame, extracting a second client signal from the high-order transmission frame, speed converting the second client signal to generate a first client signal, and transmitting the first client signal, the receiving equipment comprising:

a clock data recovery (CDR) part for extracting a clock signal from the high-order transmission frame;

a frequency divider for frequency dividing the extracted clock signal, wherein the frequency divider divides the extracted clock signal to a frequency within a frequency range suitable for a counting operation by a received data number selection part that calculates the number of data pieces of the second client signal extracted based on a stuffing information received within a unit time;

a transmitted data number count part for counting the number of data pieces of the first client signal transmitted within the unit time;

an integration counter for integrating output results of the received data number selection part and of the transmitted data number count part for each unit time;

a filter part for generating a control voltage of a voltage controlled crystal oscillator from an output result of the integration counter,

wherein the integration counter performs a de-stuffing operation by controlling a clock frequency of an output of the voltage controlled crystal oscillator so that an output of the integration counter approaches zero on a time average basis;

a second multiplier for multiplying the output of the received data number selection part by a second coefficient; and

a first multiplier for multiplying the output of the transmitted data number count part by a first coefficient,

wherein the integration counter integrates a difference between outputs of the second multiplier and the first multiplier for each unit time.

3. The receiving equipment according to claim 2 ,

wherein the receiving equipment functions without the use of a processor that creates a gapped clock.

Assignments (2)
MERGER Recorded Jan 12, 2010
From: HITACHI COMMUNICATION TECHNOLOGIES, LTD.
To: HITACHI, LTD.
Reel/Frame 023758/0625 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2007
From: KAWAMURA, KENJI; FUNADA, TAKASHI; SHIBASAKI, MASATOSHI; KUSANO, YOSHIMASA; HONDA, YUSUKE; MURAKAMI, HIROMI
To: HITACHI COMMUNICATION TECHNOLOGIES, LTD.
Reel/Frame 019724/0089 →