Voltage converter with auto-isolation function

1. A voltage converter, converting a first signal of a first voltage to output a second signal of a second voltage, comprising:

a level shifter, receiving the first signal to generate the second signal; and

an isolation circuit, coupled to an output of the level shifter, wherein when an input of the level shifter is floating, the isolation circuit outputs a substitution signal as an output signal of the level shifter, and the output signal is irrelevant to the floating input of level shifter;

wherein the level shifter further comprises:

an output terminal and a complementary output terminal, wherein the output of the level shifter is the output terminal; and

a first inverter and a second inverter serially coupled to the output terminal for outputting the second signal;

the isolation circuit is an inverter with an input terminal coupled to an output of the first inverter, feeding the output of the first inverter back to an input of the first inverter; wherein:

when the input of level shifter is not floating, the output terminal is dominated by the level shifter to output the second signal via the first inverter and second inverter; and

when the input of level shifter is floating, the inverter with the first inverter form a latch circuit to continue outputting a previous state of the second signal as the substitution signal.

2. A voltage converter, converting a first signal of a first voltage to output a second signal of a second voltage, comprising:

a level shifter, receiving the first signal to generate the second signal; and

an isolation circuit, coupled to an output of the level shifter, wherein when an input of the level shifter is floating, the isolation circuit outputs a substitution signal as an output signal of the level shifter, and the output signal is irrelevant to the floating input of level shifter;

wherein the level shifter further comprises:

an output terminal and a complementary output terminal, wherein the output of the level shifter is the complementary output terminal; and

a first inverter coupled to the complementary output terminal for outputting the second signal;

the isolation circuit is an inverter with an input terminal coupled to an output of the first inverter, feeding the output of the first inverter back to an input of first inverter; wherein:

when the input of level shifter is not floating, the complementary output terminal is dominated by the level shifter to output the second signal via the first inverter; and

when the input of level shifter is floating, the inverter with the first inverter form a latch circuit to continue outputting a previous state of the second signal as the substitution signal.

3. A voltage converter, converting a first signal of a first voltage to output a second signal of a second voltage, comprising:

a level shifter, receiving the first signal to generate the second signal; and

an isolation circuit, coupled to an output of the level shifter, wherein when an input of the level shifter is floating, the isolation circuit outputs a substitution signal as an output signal of the level shifter, and the output signal is irrelevant to the floating input of level shifter;

wherein:

the level shifter comprises an output terminal and a complementary output terminal, the output of the level shifter is the output terminal;

the isolation circuit is a pulling circuit coupled to the output terminal wherein:

when the input of level shifter is not floating, the output terminal is dominated by the level shifter to output the second signal; and

when the input of level shifter is floating, the output terminal is dominated by the pulling circuit to output a predetermined voltage as the substitution signal wherein:

the pulling circuit is a capacitor having two terminals respectively coupled to a supply voltage VCC and the output terminal;

when the input of level shifter is floating, a voltage level of the output terminal is increased to become a logic high state.

4. The voltage converter as claimed in claim 3 , wherein:

the pulling circuit is a PMOS, a gate of the PMOS being grounded, a source and a drain of the PMOS being coupled to a supply voltage VCC and the output terminal respectively; and

when the input of level shifter is floating, the output terminal is pulled to supply voltage VCC by the pulling circuit.

5. The voltage converter as claimed in claim 3 , wherein:

the pulling circuit is a NMOS, a gate of the NMOS being coupled to a supply voltage, a source and a drain of the NMOS being coupled to ground and the output terminal respectively;

when the input of level shifter is floating, the output terminal is pulled to ground by the pulling circuit.

6. The voltage converter as claimed in claim 3 , wherein:

the pulling circuit is a capacitor having two terminals respectively coupled to ground and the output terminal;

when the input of level shifter is floating, a voltage level of the output terminal is decreased to become a logic low state.

7. A voltage converter, converting a first signal of a first voltage to output a second signal of a second voltage, comprising:

a level shifter, receiving the first signal to generate the second signal; and

an isolation circuit, coupled to an output of the level shifter, wherein when an input of the level shifter is floating, the isolation circuit outputs a substitution signal as an output signal of the level shifter, and the output signal is irrelevant to the floating input of level shifter;

wherein:

the level shifter comprises an output terminal and a complementary output terminal, wherein the output of the level shifter is the complementary output terminal, wherein a first inverter is coupled to the complementary for outputting the second signal;

the isolation circuit is a pulling circuit coupled to the complementary output terminal, such that when the input of level shifter is not floating, the complementary output terminal is dominated by the level shifter to output the second signal via the first inverter; and

when the input of level shifter is floating, the output terminal is dominated by the pulling circuit to output a predetermined voltage as the substitution signal via the first inverter,

wherein:

the pulling circuit is a capacitor having two terminals respectively coupled to a supply voltage and the complementary output terminal; and

when the input of level shifter is floating, a voltage level of the complementary output terminal is increased to become a logic high state, and the voltage level at the complementary terminal is inverted by the first inverter to generate the substitution signal.

8. The voltage converter as claimed in claim 7 , wherein:

the pulling circuit is a PMOS, a gate of the PMOS being grounded, a source and a drain of the PMOS being coupled to a supply voltage and the complementary output terminal respectively; and

when the input of level shifter is floating, the complementary output terminal is pulled to supply voltage by the pulling circuit, and the voltage at the complementary terminal is inverted by the first inverter to generate the substitution signal.

9. The voltage converter as claimed in claim 7 , wherein:

the pulling circuit is a NMOS, a gate of the NMOS being coupled to a supply voltage, a source and a drain of the NMOS being coupled to ground and the complementary output terminal respectively; and

when the input of level shifter floating, the complementary output terminal is pulled to ground by the pulling circuit, and the voltage at the complementary terminal is inverted by the first inverter to generate the substitution signal.

10. The voltage converter as claimed in claim 7 , wherein:

the pulling circuit is a capacitor having two terminals respectively coupled to ground and the complementary output terminal; and

when the input of level shifter is floating, a voltage level of the complementary output terminal is decreased to become a logic low state, and the voltage level at the complementary terminal is inverted by the first inverter to generate the substitution signal.