USB 2.0 bi-directional bus channel with boost circuitry
View Patent ↗A system for allowing a designer to implement Universal Serial Bus (USB) 2.0 in topologies not anticipated by a USB 2.0 specification and with reduced channel losses, the system comprising: a bus channel having a plurality of electrical elements; and a boost circuit connected at a predetermined location on the bus channel; a plurality of USB signals transmitted through the system; wherein edges of the plurality of USB signals are boosted without impacting the bi-directional nature of the bus channel.
1. A system for allowing a designer to implement Universal Serial Bus (USB) 2.0 in topologies not anticipated by a USB 2.0 specification and with reduced channel losses, the system comprising:
a bus channel having a plurality of electrical elements;
a boost circuit connected at a predetermined location on the bus channel, the boost circuit comprising operational amplifier, an input filter, and a high-pass output filter, wherein the high-pass output filter couples, by alternating current (AC), an output of the operational amplifier to the predetermined location of the bus channel and allows only very fast edges to pass through; and
wherein the boost circuit is configured so as to boost edges of a plurality of USB signals transmitted through the system without impacting the bi-directional nature of the bus channel.
2. The system of claim 1 , wherein the predetermined location is the middle of the bus channel.
3. The system of claim 1 , wherein a cutoff frequency of the high-pass output filter is set to a 3 rd harmonic.
4. The method of claim 1 , The system of claim 3 , wherein a corner frequency is chosen to pass a 5 th harmonic of the plurality of USB signals.
5. A method for allowing a designer to implement Universal Serial Bus (USB) 2.0 in topologies not anticipated by a USB 2.0 specification, the method comprising:
a bus channel having a plurality of electrical elements and a boost circuit connected at a predetermined location on the bus channel in order to reduce channel losses by implementing the steps of:
transmitting through the system a plurality of USB signals; and
minimizing path delays and hub hops;
wherein edges of the plurality of USB signals are boosted without impacting the bi-directional nature of the bus channel;
wherein the boost circuit comprises an operational amplifier, an input filter, and a high-pass output filter, wherein the high-pass output filter couples, by alternating current (AC), an output of the operational amplifier to the predetermined location of the bus channel and allows only very fast edges to pass through.
6. The method of claim 5 , wherein the predetermined location is the middle of the bus channel.
7. The method of claim 5 , wherein a cutoff frequency of the high-pass filter is set to a 3 rd harmonic.
8. The method of claim 5 , wherein a corner frequency is chosen to pass a 5 th harmonic of the plurality of USB signals.