Liquid crystal display panel and fabricating method thereof

1. A liquid crystal display panel, comprising:

a common electrode formed on an upper substrate; and

a common pad formed on a lower substrate facing the upper substrate, the common pad supplying a common voltage to the common electrode through a short point, wherein the common pad further comprises:

a lower electrode formed on the lower substrate;

a first common contact hole formed through a gate dielectric layer covering the lower electrode;

an intermediate electrode connected to the lower electrode through the first common contact hole;

a plurality of second common contact holes formed through an organic protection layer covering the intermediate electrode; and

an upper electrode connected to the intermediate electrode through the second common contact holes,

wherein the plurality of second common contact holes are formed at an area substantially overlapping the short point.

2. The liquid crystal display panel of claim 1 , wherein the second common contact holes are formed such that the diameter of at least one of the common second contact holes is smaller than that of the short point.

3. The liquid crystal display panel of claim 2 , wherein the organic protection layer is patterned to connect the intermediate electrode and the upper electrode through the plurality of the second common contact holes.

4. The liquid crystal display panel of claim 3 , further comprising an inorganic protection layer formed below the organic protection layer, the inorganic protection layer having the same pattern as the organic protection layer.

5. The liquid crystal display panel of claim 1 , wherein the first common contact hole comprises a plurality of openings.

6. A method of fabricating a liquid crystal display panel, the method comprising:

forming a color filter substrate including a common electrode on an upper substrate;

forming a thin film transistor substrate including a common pad on a lower substrate facing the upper substrate, the common pad having a lower electrode, a first common contact hole formed through a gate dielectric layer covering the lower electrode, an intermediate electrode connected to the lower electrode through the first common contact hole, a plurality of second common contact holes penetrating an organic protection layer covering the intermediate electrode, and an upper electrode connected to the intermediate electrode through the second common contact holes; and

bonding the color filter substrate to the thin film transistor substrate such that the common electrode is electrically connected to the common pad through a short point.

7. The method of claim 6 , wherein the second common contact holes are formed such that the diameter of at least one of the second common contact holes is smaller than that of the short point.

8. The method of claim 7 , further comprising forming an inorganic protection layer below the organic protection layer, the inorganic protection layer having the same pattern as the organic protection layer.

9. The method of claim 6 , wherein the first common contact hole is formed as a plurality of openings.

10. The method of claim 6 , wherein the organic protection layer is patterned to connect the intermediate electrode and the upper electrode through the plurality of the second common contact holes.

11. The method of claim 6 , wherein the plurality of second common contact holes are formed at an area substantially overlapping the shot point.