IP Library Granted Patent US 7,511,561
Granted Patent B2
US 7,511,561 · App. 11/765,519 · Granted Mar 31, 2009

Boosting circuit

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Quick Facts
Patent No.
US 7,511,561
App. No.
11/765,519
Granted
Mar 31, 2009
Kind
B2
Abstract

The present invention provides a charge-pump boosting circuit. In a charging period of a capacitor C 1 , a PMOS transistor Q 1 and an NMOS transistor Q 2 turn on, and the capacitor C 1 is charged by voltage between a potential VCC and a potential VSS. On the other hand, in a discharging period of a boosting capacitor, a PMOS transistor Q 3 and a PMOS transistor Q 4 turn on, and charges accumulated in the boosting capacitor are discharged. In a discharging period of the capacitor C 1 , a selector SEL 1 selects a terminal T 1 , and a feedback system, in which operation voltage applied to a gate of the PMOS transistor Q 3 changes in accordance with fluctuations in output potential VDD 2 , is formed. At this time, only a resistance component of the PMOS transistor Q 3 exists and no differential amplifier is provided, on a path of current flowing-into the capacitor C 1 (between the potential VCC and a low voltage side terminal C 1 N of the boosting capacitor).

Claims (14)

1. A boosting circuit boosting a first potential to a second potential, the boosting circuit comprising:

a differential amplifier to which the first potential is inputted, and which outputs a potential corresponding to a change in the second potential;

a boosting capacitor alternately repeating a charging period and a discharging period;

a first switching element connected between a first reference potential, which is higher than the first potential, and one end of the boosting capacitor, and turning on in the charging period of the boosting capacitor;

a second switching element connected between a second reference potential, which is lower than the first potential, and another end of the boosting capacitor, and turning on in the charging period of the boosting capacitor;

a third transistor serving as a third switching element which is connected between the first reference potential and the other end of the boosting capacitor, and which turns on in the discharging period of the boosting capacitor;

a fourth switching element connected between an output terminal of the second potential and the one end of the boosting capacitor, and turning on in the discharging period of the boosting capacitor; and

a first selector selecting the second potential in the charging period of the boosting capacitor, and selecting an output potential of the differential amplifier in the discharging period of the boosting capacitor, and providing a selected potential to a control terminal of the third transistor.

2. The boosting circuit of claim 1 , wherein the first switching element includes a diode whose forward direction is from the first reference potential toward the one end of the boosting capacitor.

3. The boosting circuit of claim 1 , wherein the first switching element is a first transistor, and

the boosting circuit further comprising a second selector selecting the output potential of the differential amplifier in the charging period of the boosting capacitor, and selecting the second potential in the discharging period of the boosting capacitor, and providing a selected potential to a control terminal of the first transistor.

4. The boosting circuit of claim 3 , further comprising:

a third selector selecting the one end of the boosting capacitor in the charging period of the boosting capacitor, and selecting the other end of the boosting capacitor in the discharging period of the boosting capacitor,

wherein the first potential, and a potential of the one end or the other end which is selected by the third selector, are inputted to the differential amplifier.

Assignments (3)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Jan 22, 2009
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022162/0669 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2007
From: NAGATOMO, SHIGERU; UTSUNO, KIKUO
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 019459/0064 →