IP Library Granted Patent US 8,815,617
Granted Patent B2
US 8,815,617 · App. 11/767,388 · Granted Aug 26, 2014

Passivation of VCSEL sidewalls

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Quick Facts
Patent No.
US 8,815,617
App. No.
11/767,388
Granted
Aug 26, 2014
Kind
B2
Abstract

A semiconductor structure configured for use in a VCSEL or RCLED. The semiconductor structure includes an oxidizing layer constructed from materials that can be oxidized during a lithographic process so as to create an oxide aperture. The semiconductor structure further includes a number of layers near the oxidizing layer. A passivation material is disposed on the layers near the oxidizing layer. The passivation material is configured to inhibit oxidation of the layers.

Claims (46)

1. In a manufacturing process including processing epitaxial structures for optical semiconductor devices, a method of forming an optical semiconductor device, the method comprising:

forming a epitaxial structure on a substrate, the epitaxial structure having a bottom mirror, a lower n-type conduction region above the bottom mirror, a quantum well region above the lower n-type conduction region, an oxidizing layer above the quantum well region, and a top p-type conduction region above the oxidation layer;

forming a thermal conduction layer above the oxidizing layer, the thermal conduction layer having a sufficient amount of aluminum that, absent passivation, is subject to oxidation;

forming a top mirror above the thermal conduction layer, the top mirror including mirror periods;

depositing a plasma oxide on the top mirror over a portion of the epitaxial structure to be formed into an aperture;

etching the top mirror and thermal conduction layer above the oxidizing layer without etching the oxidizing layer so as to expose sides of the top mirror and the thermal conduction layer;

depositing a passivation layer of a protective oxide or silicon nitride on the plasma oxide and around the sides of the top mirror and the thermal conduction layer above the oxidizing layer;

etching past at least a portion of the oxidizing layer;

oxidizing a portion of the oxidizing layer to form the aperture in the oxidizing layer; and

forming a metal p-type intracavity contact on the passivation layer so as to be in contact with the top p-type conduction region and to retain the passivation layer of protective oxide or silicon nitride around the sides of the top mirror and the thermal conduction layer above the oxidizing layer under the p-type intracavity contact.

2. The method of claim 1 , wherein forming the top mirror above the oxidizing layer comprises forming at least one layer through epitaxy with a high aluminum content, wherein the aluminum content is defined approximately by Al(x)Ga(1−x) As where x is approximately greater than 0.95.

3. The method of claim 1 , wherein the epitaxial structure further comprises a stop etch layer, and wherein the etching above the oxidizing layer comprises using an etchant that is restricted from etching at the stop etch layer.

4. The method of claim 1 , wherein the passivation layer includes Silicon Dioxide.

5. The method of claim 1 , wherein the passivation layer includes Silicon Nitride.

6. The method of claim 1 , wherein the optical semiconductor device is a VCSEL.

7. The method of claim 1 , wherein the optical semiconductor device is an RCLED.

8. In a manufacturing process including processing epitaxial structures for optical semiconductor devices, a method of forming an optical semiconductor device, the method comprising:

forming a thermal conduction layer above an oxidizing layer in an epitaxial structure;

forming a top mirror above the thermal conduction layer, the top mirror including mirror periods;

etching the thermal conduction layer and top mirror above the oxidizing layer without etching the oxidizing layer;

depositing a passivation layer of a protective oxide or silicon nitride around the thermal conduction layer and top mirror above the oxidizing layer;

etching past at least a portion of the oxidizing layer;

oxidizing a portion of the oxidizing layer to form an aperture in the oxidizing layer; and

forming a metal p-type intracavity contact on the passivation layer so as to be in contact with a top p-type conduction region of the epitaxial structure and to retain the passivation layer around the thermal conduction layer and the top mirror above the oxidizing layer under the p-type intracavity contact.

9. The method of claim 1 , wherein the passivation layer is (½n-⅛)λ, thick, wherein n is an integer and λis wavelength.

10. The method of claim 8 , wherein the passivation layer is (½n-⅛)λ, thick, wherein n is an integer and λis wavelength.

11. The method of claim 1 , wherein inclusion of the thermal conduction layer enhances thermal impedance compared to when the thermal conduction layer is omitted.

12. The method of claim 8 , wherein inclusion of the thermal conduction layer enhances thermal impedance compared to when the thermal conduction layer is omitted.

13. The method of claim 1 , wherein the passivation layer is deposited by plasma enhanced chemical vapor deposition.

14. The method of claim 8 , wherein the passivation layer is deposited by plasma enhanced chemical vapor deposition.

15. In a manufacturing process including processing epitaxial structures for optical semiconductor devices, a method of forming an optical semiconductor device, the method comprising:

forming a VCSEL epitaxial structure on a substrate, the VCSEL epitaxial structure having a bottom mirror, a lower n-type conduction region above the bottom mirror, a quantum well region above the lower n-type conduction region, an oxidizing layer above the quantum well region, and a top p-type conduction region above the oxidizing layer;

forming a thermal conduction layer above the oxidizing layer, the thermal conduction layer having a sufficient amount of aluminum that, absent passivation, is subject to oxidation;

forming a top mirror above the thermal conduction layer, the top mirror including mirror periods;

depositing a plasma oxide on the top mirror over a portion of the epitaxial structure to be formed into an aperture;

etching the top mirror and thermal conduction layer above the oxidizing layer without etching the oxidizing layer so as to expose sides of the top mirror and the thermal conduction layer;

depositing a photoresist onto the exposed sides of the top mirror and the thermal conduction layer;

etching with a dilute HF etch to the top p-type conduction region such that the top mirror is not undercut by the HF etch;

removing the photoresist;

depositing a passivation layer of a protective oxide or silicon nitride on the plasma oxide and around the sides of the top mirror and the thermal conduction layer above the oxidizing layer so as to seal the top mirror;

etching past at least a portion of the oxidizing layer;

oxidizing a portion of the oxidizing layer to form the aperture in the oxidizing layer; and

forming a metal p-type intracavity contact on the passivation layer so as to be in contact with the top p-type conduction region and to retain the passivation layer around the exposed sides of the top mirror and the thermal conduction layer above the oxidizing layer under the p-type intracavity contact.

16. The method of claim 15 , wherein the passivation layer is (½n-⅛)λ, thick, wherein n is an integer and λis wavelength.

17. The method of claim 16 , wherein the passivation layer is deposited by plasma enhanced chemical vapor deposition.

18. The method of claim 17 , wherein forming the mirror periods above the oxidizing layer comprises forming at least one layer through epitaxy with a high aluminum content, wherein the aluminum content is defined approximately by Al(x)Ga(1−x)As where x is approximately greater than 0.95.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2007
From: JOHNSON, RALPH H.
To: FINISAR CORPORATION
Reel/Frame 019498/0512 →