Architectures for an implantable medical device system
View Patent ↗An improved architecture for an implantable medical device such as an implantable pulse generator (IPG) is disclosed. In one embodiment, the various functional blocks for the IPG are incorporated into a signal integrated circuit (IC). Each of the functional blocks communicate with each other, and with other off-chip devices if necessary, via a centralized bus governed by a communication protocol. To communicate with the bus and to adhere to the protocol, each circuit block includes bus interface circuitry adherent with that protocol. Because each block complies with the protocol, any given block can easily be modified or upgraded without affecting the design of the other blocks, facilitating debugging and upgrading of the IPG circuitry. Moreover, because the centralized bus can be taken off the integrated circuit, extra circuitry can easily be added off chip to modify or add functionality to the IPG without the need for a major redesign of the main IPG IC.
1. An implantable stimulator device, comprising:
an integrated circuit comprising a plurality of functional blocks, wherein the functional blocks comprise
one or more first blocks selected from the group consisting of (i) an analog-to-digital converter, (ii) telemetry circuitry configured to communicate with a device external to the implantable stimulator device, and (iii) battery charging circuitry configured to charge a battery in the implantable stimulator device,
stimulation circuitry configured to provide stimulation pulses to at least one tissue-stimulating electrode coupled to the stimulation circuitry, and
an interrupt controller configured to receive interrupts issued by one or more of the first blocks and to receive an interrupt issued by the stimulation circuitry; and
a digital bus directly connected to each of the functional blocks, wherein the functional blocks communicate with each other via a bus protocol, and wherein the interrupts are not communicated on the digital bus.
2. The device of claim 1 , wherein one of the functional blocks further comprises a master controller, and wherein all other functional blocks are slaves to the master controller.
3. The device of claim 1 , wherein the integrated circuit further comprises an analog bus, wherein the analog-to-digital converter receives a plurality of analog signals on the analog bus from at least some of the functional blocks outside of the digital bus.
4. The device of claim 1 , wherein the integrated circuit has external terminals, and wherein the digital bus is directly connected to at least one external terminal to allow the digital bus to communicate with at least one device outside the integrated circuit.
5. The device of claim 4 , wherein the device outside the integrated circuit comprises a memory circuit.
6. The device of claim 4 , wherein the device outside the integrated circuit comprises a controller.
7. The device of claim 1 , wherein the digital bus is a parallel bus.
8. The device of claim 1 , further comprising bus interface circuitry interposed between each functional block and the digital bus, wherein the bus interface circuitry allows the functional blocks to communicate with each other via the bus protocol.
9. An implantable stimulator device, comprising:
a plurality of functional blocks, wherein the functional blocks comprise
one or more first blocks selected from the group consisting of (i) an analog-to-digital converter, (ii) telemetry circuitry configured to communicate with a device external to the implantable stimulator device, and (iii) battery charging circuitry configured to charge a battery in the implantable stimulator device,
stimulation circuitry configured to provide stimulation pulses to at least one tissue-stimulating electrode coupled to the stimulation circuitry, and
an interrupt controller configured to receive interrupts issued by one or more of the first blocks and to receive an interrupt issued by the stimulation circuitry; and
a digital bus directly connected to each of the functional blocks, wherein communications on the digital bus are governed via a bus protocol, and wherein the interrupts are not communicated on the digital bus.
10. The device of claim 9 , wherein one of the functional blocks further comprises a master controller, and wherein all other functional blocks are slaves to the master controller.
11. The device of claim 9 , further comprising an analog bus, wherein the analog-to-digital converter receives a plurality of analog signals on the analog bus from at least some of the functional blocks outside of the digital bus.
12. The device of claim 9 , wherein the plurality of functional blocks and the digital bus are integrated on a single integrated circuit, and wherein the integrated circuit has external terminals, and wherein the digital bus is directly connected to a plurality of external terminals to allow the digital bus to communicate with at least one device outside the integrated circuit.
13. The device of claim 12 , wherein the device outside the integrated circuit comprises a memory circuit.
14. The device of claim 12 , wherein the device outside the integrated circuit comprises a controller.
15. The device of claim 9 , wherein the digital bus is a parallel bus.
16. The device of claim 9 , further comprising bus interface circuitry interposed between each functional block and the digital bus, wherein the bus interface circuitry allows the functional blocks to communicate with each other via the bus protocol.
17. An implantable stimulator device, comprising:
an integrated circuit comprising a plurality of functional blocks, wherein the functional blocks comprise
one or more first blocks selected from the group consisting of (i) an analog-to-digital converter, (ii) telemetry circuitry configured to communicate with a device external to the implantable stimulator device, and (iii) battery charging circuitry configured to charge a battery in the implantable stimulator device,
stimulation circuitry configured to provide stimulation pulses to at least one tissue-stimulating electrode coupled to the stimulation circuitry, and
an interrupt controller configured to receive interrupts issued by one or more of the first blocks and to receive an interrupt issued by the stimulation circuitry;
at least one device external to the integrated circuit; and
a digital bus directly connected to each of the functional blocks and to the external device, wherein the external device and the functional blocks communicate with the digital bus in accordance with a protocol, and wherein the interrupts are not communicated on the digital bus.
18. The device of claim 17 , wherein one of the functional blocks comprises a master controller, and wherein all other functional blocks are slaves to the master controller.
19. The device of claim 17 , wherein the integrated circuit further comprises an analog bus, wherein the analog-to-digital converter receives a plurality of analog signals on the analog bus from at least some of the functional blocks outside of the digital bus.
20. The device of claim 17 , wherein the integrated circuit has external terminals, and wherein each of a plurality of signals that comprise the digital bus is directly connected to an external terminal to allow the digital bus to communicate with the at least one device external to the integrated circuit.
21. An implantable stimulator device, comprising:
an integrated circuit comprising a plurality of functional blocks, each block for performing at least one function within the implantable medical device, at least one block comprising an internal controller for all other functional blocks in the integrated circuit, and wherein at least one of the other functional blocks controlled by the internal controller comprises stimulation circuitry coupled to at least one electrode that delivers electrical stimulation to a tissue of a patient;
an external controller device external to the integrated circuit; and
a digital bus directly connected to each of the functional blocks and to the external controller, wherein the digital bus receives issued commands,
wherein the internal controller comprises controller select circuitry for determining whether an issued command on the digital bus comprises a first command executable by the internal controller or a second command executable by the external controller, and for issuing a controller select signal in accordance with the determination.
22. The device of claim 21 , wherein the controller select circuitry comprises a register, each location in the register associated with a particular command, and each location providing the controller select signal for its associated particular command.
23. The device of claim 22 , wherein the issued controller select signal is sent to an arbitration circuit in the external controller.
24. A method for operating an implantable stimulator device, comprising:
issuing a command on a digital bus, wherein the digital bus is directly connected to:
an integrated circuit comprising a plurality of functional blocks, wherein one of the functional blocks comprises a first controller, and wherein at least one other functional block comprises stimulation circuitry for the implantable stimulator device, wherein at least one tissue-stimulating electrode is coupled to the stimulation circuitry, and
a second controller, wherein the second controller is external to the integrated circuit;
determining whether the issued command is to be executed by the first controller or the second controller, and issuing a controller select signal in accordance with the determination; and
executing the command at the first or second controller in accordance with the controller select signal.
25. The method of claim 24 , wherein the determining step is accomplished by the first controller via decoding the issued command and retrieving the controller select signal from a register in the first controller.
26. The method of claim 25 , further comprising having the second controller retrieve the issued command from the first controller when the issued command is to be executed by the second controller.
27. The method of claim 26 , further comprising returning control back to the first controller after the issued command is executed by the second controller.