IP Library Granted Patent US 7,491,591
Granted Patent B2
US 7,491,591 · App. 11/768,332 · Granted Feb 17, 2009

Thin film transistor having LDD structure

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Quick Facts
Patent No.
US 7,491,591
App. No.
11/768,332
Granted
Feb 17, 2009
Kind
B2
Abstract

A thin film transistor having a LDD structure that may improve its channel reliability and output characteristics. A semiconductor layer comprises source/drain regions, a channel region positioned between the source/drain regions, and an LDD region positioned between the channel region and a source/drain region, wherein a projected range of ions doped on the semiconductor layer extends to a first depth from the surface of the semiconductor layer in the LDD region.

Claims (12)

1. A method for fabricating a thin film transistor, comprising:

forming a semiconductor layer on a substrate;

forming a gate insulation layer on the semiconductor layer;

forming a gate electrode on the gate insulation layer;

etching an entire upper surface of the gate insulation layer except a portion on which the gate electrode is formed by as much as a first thickness; and

forming a lightly doped drain (LDD) region in which a projected range of ions doped in the semiconductor layer extends to a first depth from a surface of the semiconductor layer,

wherein the first thickness equals the first depth.

2. The method of claim 1 , wherein the first depth satisfies the following mathematical expression:

(thickness of the semiconductor layer/2)-100 Å≦first depth≦(thickness of the semiconductor layer/2)+100 Å.

3. The method of claim 1 , wherein ion doping for forming the LDD region is performed under accelerated voltage conditions in a range of about 80 to about 90 keV.

4. The method of claim 1 , wherein ion doping for forming the LDD region is performed under dose conditions in a range of about 1E13 to about 5E13 ions/cm2.

5. The method of claim 1 , wherein the portion of the gate insulation layer on which the gate electrode is formed has a second thickness before and after the gate insulation layer is etched, and a portion of the gate insulation layer on which the gate electrode is not formed has the second thickness before being etched and a third thickness after being etched, the difference between the second thickness and the third thickness equaling the first thickness.

Assignments (2)
MERGER Recorded Aug 29, 2012
From: SAMSUNG MOBILE DISPLAY CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 028868/0359 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2008
From: SAMSUNG SDI CO., LTD.
To: SAMSUNG MOBILE DISPLAY CO., LTD.
Reel/Frame 022024/0026 →