IP Library Granted Patent US 7,791,390
Granted Patent B2
US 7,791,390 · App. 11/768,427 · Granted Sep 7, 2010

Phase shifter

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Quick Facts
Patent No.
US 7,791,390
App. No.
11/768,427
Granted
Sep 7, 2010
Kind
B2
Abstract

A phase shifter according to an embodiment of the present invention includes: an AC component amplifying unit; and a dividing circuit. The AC component amplifying unit has positive gain slope characteristics and deforms a waveform of an input differential clock signal to output the deformed differential clock signal. The dividing circuit includes a T-flipflop having two D latches connected in series and receives the deformed differential clock signal defoemed by the AC component amplifying unit to generate at least two output signals having a phase difference of 90 degrees with a frequency of ½ of the deformed differential clock signal.

Claims (24)

1. A phase shifter, comprising:

an AC component amplifying unit having positive gain slope characteristics and deforming a waveform of an input differential clock signal to output a deformed differential clock signal and amplifying AC components of the input differential clock signal in a frequency range where signal intensity is changed due to a deterioration of duty ratios of the input differential clock signal;

a dividing circuit including a T-flipflop having two D latches connected in series and receiving the deformed differential clock signal deformed by the AC component amplifying unit to generate at least two output signals having a phase difference of 90 degrees with a frequency of ½ of the deformed differential clock signal;

a detecting unit detecting a phase difference between the two output signals and outputting a control signal corresponding to the detected phase difference; and

a variable capacitor connected to an output line of at least one of the two output signals and capable of changing a capacitance in accordance with the control signal.

2. A phase shifter, comprising:

an AC component amplifying unit having positive gain slope characteristics and deforming a waveform of an input differential clock signal to output a deformed differential clock signal and amplifying AC components of the input differential clock signal in a frequency range where signal intensity is changed due to a deterioration of duty ratios of the input differential clock signal;

a dividing circuit including a T-flipflop having two D latches connected in series and receiving the deformed differential clock signal deformed by the AC component amplifying unit to generate at least two output signals having a phase difference of 90 degrees with a frequency of ½ of the deformed differential clock signal; and

a detecting unit detecting a phase difference between the two output signals and outputting a control signal corresponding to the detected phase difference,

wherein gain slope characteristics of the AC component amplifying unit can be changed in accordance with the control signal.

3. A phase shifter, comprising:

an AC component amplifying unit having positive gain slope characteristics and deforming a waveform of an input differential clock signal to output a deformed differential clock signal and amplifying AC components of the input differential clock signal in a frequency range where signal intensity is changed due to a deterioration of duty ratios of the input differential clock signal; and

a dividing circuit including a T-flipflop having two D latches connected in series and receiving the deformed differential clock signal deformed by the AC component amplifying unit to generate at least two output signals having a phase difference of 90 degrees with a frequency of ½ of the deformed differential clock signal,

wherein the AC component amplifying unit is configured to apply a gain to the input differential clock signal according to such gain slope characteristics that a gain increases along with an increase in frequency in at least one frequency range, the frequency range including a frequency of the input differential clock signal, and

wherein the AC component amplifying unit has gain slope characteristics wherein the gain in decibels increases linearly with an increase in frequency from a first frequency, f 1 , to a second frequency, f 2 , where f 1 and f 2 are determined according to following relationships:

f 1 =fclk*[1/(xUI*2)],

f 2 =fclk*[1/((1−xUI)*2)],

fclk<f 2 ,

0.5fclk<f 1 <fclk,

0.5<xUI<1,

where fclk is frequency of the input differential clock signal,

U 1 is a unit interval equal to period of the input differential clock signal,

xU 1 is a first time interval longer than a second time interval, and

(1−xUI) is the second time interval.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 4, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025311/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2007
From: KUROKI, REIKO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 019492/0423 →