IP Library Granted Patent US 7,890,811
Granted Patent B2
US 7,890,811 · App. 11/771,994 · Granted Feb 15, 2011

Method and apparatus for improved memory reliability, availability and serviceability

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,890,811
App. No.
11/771,994
Granted
Feb 15, 2011
Kind
B2
Abstract

Methods and apparatus dynamically reconfigure storage or channel capacities in a memory system. A fully-buffered dual in-line memory module (DIMM) is configured for a particular storage capacity and a particular channel capacity. An error may be detected at a memory address in some portion of the DIMM. To resolve the problem, the storage capacity or the channel capacity may be reduced and the DIMM may be dynamically reconfigured according to the reduced capacity. For one embodiment the DIMM may be reconfigured by mapping the portion of the DIMM containing the error as unavailable and taking that portion off-line without taking the entire DIMM off-line. For another embodiment the DIMM may be reconfigured by throttling the DIMM at a reduced frequency. The portion of the DIMM containing the error may be retested at the reduced frequency. If no errors are detected, the DIMM may be made available at the reduced frequency.

Claims (39)

1. A method for dynamically reconfiguring storage or channel capacities in a memory system, the method comprising:

detecting a memory error for a memory address in a portion of a dual in-line memory module (DIMM) configured according to a first non-zero capacity;

reducing the first non-zero capacity to determine a second non-zero capacity;

dynamically configuring the DIMM according to said second non-zero capacity, wherein said first and second non-zero capacities represent alternative channel capacities of the DIMM.

2. The method of claim 1 wherein said first and second non-zero capacities represent alternative data storage capacities of the DIMM.

3. The method of claim 2 wherein dynamically configuring the DIMM according to said second non-zero capacity, is accomplished by:

mapping the portion of the DIMM containing the memory address where the memory error was detected as unavailable; and

taking said portion, but not the entire DIMM off-line.

4. The method of claim 1 wherein dynamically configuring the DIMM according to said second non-zero capacity, is accomplished by:

throttling the DIMM at a reduced frequency;

retesting, at said reduced frequency, the portion of the DIMM containing the memory address where the memory error was detected; and upon successful retesting

making the DIMM available on-line at said reduced frequency.

5. An article of manufacture to dynamically reconfigure storage or channel capacities, the article comprising a non-transitory machine readable tangible medium including a program, said program being executable by a machine to perform a method comprising:

detecting a memory error for a memory address in a portion of a dual in-line memory module (DIMM) configured according to a first non-zero capacity;

reducing the first non-zero capacity to determine a second non-zero capacity;

causing a memory controller to dynamically reconfigure the DIMM according to said second non-zero capacity, wherein said first and second non-zero capacities represent alternative channel capacities of the DIMM.

6. The article of claim 5 wherein said first and second non-zero capacities represent alternative data storage capacities of the DIMM.

7. The article of claim 6 wherein causing the memory controller to dynamically reconfigure the DIMM according to said second non-zero capacity, is accomplished by:

mapping the portion of the DIMM containing the memory address where the memory error was detected as unavailable; and

taking said portion, but not the entire DIMM off-line.

8. The article of claim 5 wherein causing the memory controller to dynamically reconfigure the DIMM according to said second non-zero capacity, is accomplished by:

throttling the DIMM at a reduced frequency;

retesting, at said reduced frequency, the portion of the DIMM containing the memory address where the memory error was detected; and upon successful retesting

making the DIMM available on-line at said reduced frequency.

9. A memory system programmable to dynamically reconfigure storage or channel capacities, the system comprising:

a dual in-line memory module (DIMM) configurable according to a first non-zero capacity;

a memory controller operatively coupled with said DIMM to configure the DIMM according to said first non-zero capacity;

a machine readable tangible medium including a program, said program being executable by a machine to perform a method comprising:

detecting a memory error for a memory address in a portion of the DIMM;

reducing the first non-zero capacity to determine a second non-zero capacity;

causing the memory controller to dynamically reconfigure the DIMM according to said second non-zero capacity, wherein said first and second non-zero capacities represent alternative channel capacities of the DIMM.

10. The system of claim 9 wherein said first and second non-zero capacities represent alternative data storage capacities of the DIMM.

11. The system of claim 10 wherein causing the memory controller to dynamically reconfigure the DIMM according to said second non-zero capacity, is accomplished by:

mapping the portion of the DIMM containing the memory address where the memory error was detected as unavailable; and

taking said portion, but not the entire DIMM off-line.

12. The system of claim 9 wherein causing the memory controller to dynamically reconfigure the DIMM according to said second non-zero capacity, is accomplished by:

throttling the DIMM at a reduced frequency;

retesting, at said reduced frequency, the portion of the DIMM containing the memory address where the memory error was detected; and upon successful retesting

making the DIMM available on-line at said reduced frequency.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2007
From: ROTHMAN, MICHAEL A; ZIMMER, VINCENT J.; LOPEZ, FERNANDO A.; SWANSON, ROBERT C.; BULUSU, MALLIK
To: INTEL CORPORATION
Reel/Frame 020229/0318 →
Continuity (1)
Related Publication 20090006837A1 · Jan 1, 2009