IP Library Granted Patent US 7,899,852
Granted Patent B2
US 7,899,852 · App. 11/777,910 · Granted Mar 1, 2011

Systems, methods, and apparatus for quasi-adiabatic quantum computation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,899,852
App. No.
11/777,910
Granted
Mar 1, 2011
Kind
B2
Abstract

Methods, systems and apparatus for quasi-adiabatic quantum computation include initializing a quantum processor to a ground state of an initial Hamiltonian and evolving the quantum processor from the initial Hamiltonian to a final Hamiltonian via an evolution Hamiltonian, wherein anti-crossings of the evolution Hamiltonian are passed non-adiabatically.

Claims (99)

1. A method of quantum computation comprising:

initializing a quantum processor to a ground state of an initial Hamiltonian; and

evolving the quantum processor from the initial Hamiltonian to a final Hamiltonian via an evolution Hamiltonian;

wherein evolving the quantum processor comprises:

exciting the quantum processor to an excited state of the evolution Hamiltonian; and

non-adiabatically passing an anti-crossing of the evolution Hamiltonian.

2. The method of claim 1 , wherein the final Hamiltonian encodes a computational problem and a ground state of the final Hamiltonian represents a solution to the computational problem.

3. The method of claim 1 , wherein exciting the quantum processor to an excited state includes applying a microwave pulse to the quantum processor.

4. The method of claim 3 , wherein applying a microwave pulse to the quantum processor includes applying at least one of a current and a voltage to a coil in physical proximity to the quantum processor.

5. The method of claim 1 , wherein exciting the quantum processor to an excited state includes thermally exciting the quantum processor.

6. The method of claim 1 , wherein the quantum processor is excited prior to non-adiabatically passing the anti-crossing.

7. The method of claim 1 , wherein evolving the quantum processor from the initial Hamiltonian to a final Hamiltonian includes approximately adiabatically evolving the quantum processor except when non-adiabatically passing the anti-crossing.

8. The method of claim 1 , wherein exciting the quantum processor to an excited state of the evolution Hamiltonian includes exciting the quantum processor to a first excited state of the evolution Hamiltonian.

9. The method of claim 1 , wherein non-adiabatically passing an anti-crossing of the evolution Hamiltonian includes transitioning the quantum processor from the excited state of the evolution Hamiltonian to the ground state of the evolution Hamiltonian.

10. The method of claim 1 , further comprising:

repeating the evolution of the quantum processor from the initial Hamiltonian to the final Hamiltonian.

11. The method of claim 10 , wherein the evolution is repeated a determined number of times.

12. The method of claim 10 , wherein the evolution is repeated for a determined time.

13. The method of claim 10 , wherein the evolution is repeated until at least one determined criterion has been satisfied.

14. The method of claim 1 , wherein the quantum processor comprises:

a plurality of qubits disposed in a two-dimensional array;

a plurality of coupling devices configurable for coupling two or more of the qubits together;

a plurality of local bias devices; and

at least one readout device for reading out a state of at least one qubit.

15. A quantum computation system, comprising:

a quantum processor;

an excitation device configurable for exciting the quantum processor from a first state to a second state;

a digital processor in communication with the quantum processor; and

a memory storing a set of processor executable instructions that cause the digital processor to facilitate quantum processing, by:

initializing the quantum processor to a ground state of an initial Hamiltonian; and

evolving the quantum processor from the initial Hamiltonian to a final Hamiltonian via an evolution Hamiltonian;

wherein evolving the quantum processor includes:

exciting the quantum processor to an excited state of the evolution Hamiltonian via the excitation device; and

non-adiabatically passing an anti-crossing of the evolution Hamiltonian.

16. The system of claim 15 , wherein the final Hamiltonian encodes a computational problem to be solved and a ground state of the final Hamiltonian represents a solution to the computational problem.

17. The system of claim 15 , wherein the excitation device is configured to excite the quantum processor via one or more microwave pulses.

18. The system of claim 17 , wherein exciting the quantum processor includes varying a frequency of the one or more microwave pulses.

19. The system of claim 15 , wherein the excitation device is configured to excite the quantum processor via thermal excitation.

20. The system of claim 15 , wherein the quantum processor comprises:

a plurality of qubits disposed in a two-dimensional array;

a plurality of coupling devices configurable for coupling two or more of the qubits together;

a plurality of local bias devices; and

at least one readout device for reading out a state of at least one qubit.

21. The system of claim 15 , wherein the memory further comprises instructions for repeating the initialization of the quantum processor and the evolution of the quantum processor.

22. A computer program product for use with a computer system, the computer program product comprising a computer readable storage medium and a computer program mechanism embedded therein, the computer program mechanism comprising:

instructions for initializing a quantum processor to a ground state of an initial Hamiltonian; and

instructions for evolving the quantum processor from the initial Hamiltonian to a final Hamiltonian via an evolution Hamiltonian;

wherein the instructions for evolving the quantum processor comprise:

instructions for exciting the quantum processor to an excited state of the evolution Hamiltonian via the excitation device; and

instructions for non-adiabatically passing an anti-crossing of the evolution Hamiltonian.

23. The computer program product of claim 22 , wherein the final Hamiltonian encodes a computational problem to be solved and a ground state of the final Hamiltonian represents a solution to the computational problem.

24. The computer program product of claim 22 , wherein the instructions for exciting the quantum processor include instructions for applying one or more microwave pulses to the quantum processor.

25. The computer program product of claim 24 , wherein the instructions for exciting the quantum processor include instructions for varying a frequency of the one or more microwave pulses.

26. The computer program product of claim 22 , wherein the instructions for exciting the quantum processor include instructions for exciting the quantum processor via thermal excitation.

27. The computer program product of claim 22 , further comprising:

instructions for repeating the evolution of the quantum processor from the initial Hamiltonian to a final Hamiltonian.

28. A method of quantum computation, comprising:

initializing a quantum processor to a ground state of a first Hamiltonian; and

evolving the quantum processor from the first Hamiltonian to a second Hamiltonian via an evolution Hamiltonian, wherein evolving the quantum processor comprises non-adiabatically passing an anti-crossing of the evolution Hamiltonian; and

measuring an end state of the quantum processor.

29. The method of claim 28 , wherein the second Hamiltonian encodes a computational problem to be solved and a ground state of the second Hamiltonian represents a solution to the computational problem.

30. The method of claim 28 , further comprising:

verifying that the end state is an acceptable solution to the computational problem.

31. The method of claim 28 , further comprising:

repeating the initializing, evolving and measuring for a number of cycles until a stopping condition is met.

32. The method of claim 31 , further comprising:

storing the end state for each cycle; and

selecting a final state from the stored end states.

33. The method of claim 32 , wherein selecting a final state from the stored end states includes selecting a lowest energy final state.

34. The method of claim 32 , wherein selecting a final state from the stored end states includes selecting a most frequently occurring final state.

35. The method of claim 32 , further comprising:

verifying that the selected final state is an acceptable solution to the computational problem.

36. The method of claim 31 , wherein the stopping condition is at least one of a predetermined number of cycles and a predetermined time.

37. The method of claim 28 , wherein the quantum processor comprises:

a plurality of qubits disposed in a two-dimensional array;

a plurality of coupling devices configurable for coupling two or more of the qubits together;

a plurality of local bias devices; and

at least one readout device for reading out a state of at least one qubit.

38. The method of claim 28 , wherein evolving the quantum processor further includes thermal mixing of a state of the quantum processor when passing the anti-crossing.

39. The method of claim 28 , wherein evolving the quantum processor further includes evolving the quantum processor adiabatically except when passing the anti-crossing.

40. The method of claim 28 , wherein evolving the quantum processor further includes exciting the quantum processor to an excited state of the evolution Hamiltonian.

41. A method of quantum computation, comprising:

initializing a quantum processor to a ground state of an initial Hamiltonian; and

evolving the quantum processor from the initial Hamiltonian to a final Hamiltonian via an evolution Hamiltonian, wherein evolving the quantum processor comprises thermally mixing at least one state of the quantum processor; and

measuring a final state of the quantum processor.

42. The method of claim 41 , wherein the final Hamiltonian encodes a computational problem to be solved and a ground state of the final Hamiltonian represents a solution to the computational problem.

43. The method of claim 41 , further comprising:

verifying that the final state is an acceptable solution to the computational problem.

44. The method of claim 41 , further comprising:

repeating the initializing, evolving and measuring until a stopping condition is met.

45. The method of claim 41 , wherein the quantum processor comprises:

a plurality of qubits disposed in a two-dimensional array;

a plurality of coupling devices configurable for coupling two or more of the qubits together;

a plurality of local bias devices; and

at least one readout device for reading out a state of at least one qubit.

46. The method of claim 41 , wherein thermally mixing at least one state of the quantum processor includes thermally mixing the at least one state of the quantum processor when passing an anti-crossing of the evolution Hamiltonian.

47. The method of claim 46 , wherein passing an anti-crossing of the evolution Hamiltonian includes passing the anti-crossing non-adiabatically.

48. The method of claim 41 , wherein evolving the quantum processor includes evolving the quantum processor adiabatically except when thermally mixing the state of the quantum processor.

49. The method of claim 41 , wherein evolving the quantum processor further includes exciting the quantum processor to an excited state of the evolution Hamiltonian.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2025
From: PSPIB UNITAS INVESTMENTS II INC.
To: D-WAVE SYSTEMS INC.; 1372934 B.C. LTD.
Reel/Frame 070470/0098 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Apr 14, 2023
From: D-WAVE SYSTEMS INC.; 1372934 B.C. LTD.
To: PSPIB UNITAS INVESTMENTS II INC., AS COLLATERAL AGENT
Reel/Frame 063340/0888 →
RELEASE OF SECURITY INTEREST Recorded Sep 20, 2022
From: PSPIB UNITAS INVESTMENTS II INC., IN ITS CAPACITY AS COLLATERAL AGENT
To: D-WAVE SYSTEMS INC.
Reel/Frame 061493/0694 →
SECURITY INTEREST Recorded Mar 3, 2022
From: D-WAVE SYSTEMS INC.
To: PSPIB UNITAS INVESTMENTS II INC.
Reel/Frame 059317/0871 →
SECURITY INTEREST Recorded Nov 29, 2019
From: D-WAVE SYSTEMS INC.
To: BDC CAPITAL INC.
Reel/Frame 051144/0499 →
SECURITY INTEREST Recorded Mar 22, 2019
From: D-WAVE SYSTEMS INC.
To: BDC CAPITAL INC.
Reel/Frame 048674/0188 →
RELEASE OF SECURITY INTEREST Recorded Apr 13, 2017
From: VENTURE LENDING & LEASING VI, INC.; VENTURE LENDING & LEASING VII, INC.
To: D-WAVE SYSTEMS INC.
Reel/Frame 042252/0256 →
CORRECTIVE ASSIGNMENT TO REMOVE APPL. NO. 8733763 PREVIOUSLY RECORDED AT REEL: 034841 FRAME: 0497. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Jan 30, 2015
From: D-WAVE SYSTEMS INC.
To: VENTURE LENDING & LEASING VI, INC.; VENTURE LENDING & LEASING VII, INC.
Reel/Frame 034862/0237 →
SECURITY INTEREST Recorded Jan 29, 2015
From: D-WAVE SYSTEMS INC.
To: VENTURE LENDING & LEASING VI, INC.; VENTURE LENDING & LEASING VII, INC.
Reel/Frame 034841/0497 →