Electrostatic protective circuit and semiconductor device
View Patent ↗An electrostatic protective circuit includes a bipolar transistor, a bipolar transistor and an FET. The bipolar transistors and are coupled in series between a signal line and the ground (GND). The FET is configured that a source and a bulk thereof are coupled to a node N situated between the bipolar transistors, a gate is coupled to the signal line, and a drain is coupled to the power supply.
1. An electrostatic protective circuit, comprising:
a first and a second protective elements, which are coupled in series between a signal line and a power supply; and
a field effect transistor, having a source, a bulk, a gate and a drain, wherein said source and said bulk are coupled between said first and said second protective elements, said gate is coupled to said signal line, and said drain is coupled to said power supply.
2. The electrostatic protective circuit as set forth in claim 1 , wherein each of said protective elements is a bipolar transistor.
3. The electrostatic protective circuit as set forth in claim 2 , wherein a collector of said first protective element is coupled to a collector of said second protective element, an emitter and a base of said first protective element are coupled to said signal line, and an emitter and a base of said second protective element are coupled to said power supply.
4. The electrostatic protective circuit as set forth in claim 3 , wherein said bipolar transistor is an npn-type, and said field effect transistor is a p-channel type.
5. The electrostatic protective circuit as set forth in claim 3 , wherein said bipolar transistor is a PNP-type, and said field effect transistor is an n-channel type.
6. The electrostatic protective circuit as set forth in claim 2 , wherein an emitter and a base of said second protective element are coupled to an emitter and a base of said first protective element, respectively, wherein a collector of said first protective element is coupled to said signal line, and wherein a collector of said second protective element is coupled to said power supply.
7. The electrostatic protective circuit as set forth in claim 6 , wherein said bipolar transistor is an npn-type, and said field effect transistor is an n-channel type.
8. The electrostatic protective circuit as set forth in claim 6 , wherein said bipolar transistor is a pnp-type, and said field effect transistor is a p-channel.
9. The electrostatic protective circuit as set forth in claim 1 , wherein each of said protective elements is a diode.
10. The electrostatic protective circuit as set forth in claim 9 , wherein a cathode of said first protective element is coupled to a cathode of said second protective element, and anodes of said first and said second protective elements are coupled to said signal line and said power supply, respectively.
11. The electrostatic protective circuit as set forth in claim 9 , wherein an anode of said first protective element is coupled to an anode of said second protective element, and cathodes of said first and said second protective elements are coupled to said signal line and said power supply, respectively.
12. The electrostatic protective circuit as set forth in claims 1 , wherein said gate of said field effect transistor is coupled to said signal line through a resistive element.
13. The electrostatic protective circuit as set forth in claims 1 , wherein said source and said bulk of said field effect transistor are coupled to said power supply through a resistive element.
14. The electrostatic protective circuit as set forth in claims 1 , further comprising an impurity-diffusing layer, which is provided in the semiconductor substrate and serves as said drain of said field effect transistor, wherein said impurity-diffusing layer constitutes portions of said the first or said second protective elements.
15. A semiconductor device, comprising an electrostatic protective circuit as set forth in claims 1 .
16. The semiconductor device as set forth in claim 15 , wherein said field effect transistor is a field effect transistor employed in the internal circuit of the semiconductor device.
17. An electrostatic protective circuit, comprising:
a first and a second protective element which are coupled in series with opposite polarity between a signal line and a power supply; and
a field effect transistor, having a source, a bulk, a gate and a drain, wherein said source and said bulk are coupled between said first and said second protective elements, said gate is coupled to said signal line, and said drain is coupled to said power supply.