Solid state imaging device having wirings with lateral extensions
View Patent ↗A solid-state imaging device is provided. The solid-state imaging device includes an imaging area that includes arrayed pixels having photoelectric converting units and transistor elements; and a peripheral circuit, in which a wiring line in the imaging area that is shifted based on pupil correction amount and a wiring line in the peripheral circuit that is not shifted are connected through a connection expanded portion integrally formed with one or both of the wiring lines.
1. A solid-state imaging device comprising:
an imaging area that includes arrayed pixels having photoelectric converting units and transistor elements; and
a peripheral circuit, wherein
a wiring line in the imaging area that is shifted based on a pupil correction amount and a wiring line in the peripheral circuit that is not shifted are connected through a connection expanded portion integrally formed with the wiring lines, and wherein the connection expanded portion extends in a direction generally perpendicular to the wiring from which it extends and being in a same wiring level as the wiring from which it extends, and further wherein a connection expanded portion is integrally formed with each of a plurality of wiring lines of the imaging area and a plurality of wiring lines of the peripheral circuit such that the connection expanded portions are designed to have at least a partial overlap for adjacent ones of the imaging area wiring lines and the peripheral circuit wiring lines.
2. A solid-state imaging device according to claim 1 , wherein
the connection expanded portion has a width corresponding to a maximum shifted width or more relative to the distance from the center of the imaging area.
3. A solid-state imaging device according to claim 1 , wherein
the connection expanded portion is formed in the vicinity of a boundary between the imaging area and the peripheral circuit.
4. A solid-state imaging device according to claim 1 , wherein
the wiring line in the imaging area and the wiring line in the peripheral circuit are formed of wiring layers different from each other.
5. A solid-state imaging device comprising:
an imaging area that includes arrayed pixels having photoelectric converting units and transistor elements; and
a peripheral circuit, wherein
a wiring line in the imaging area that is shifted based on a pupil correction amount is connected through a connection expanded portion integrally formed with the wiring line to a contact area of an element in the peripheral circuit, and wherein the connection expanded portion extends in a direction generally perpendicular to the wiring from which it extends and being in a same wiring level as the wiring from which it extends, and further wherein a connection expanded portion is integrally formed with each of a plurality of wiring lines of the imaging area and the contact of the peripheral circuit such that the connection expanded portions are designed to have at least a partial overlap for adjacent ones of the imaging area wiring lines and the peripheral circuit contact.
6. A method of manufacturing a solid-state imaging device including an imaging area that includes arrayed pixels having photoelectric converting units and transistor elements and a peripheral circuit, in which a wiring line in the imaging area that is shifted based on pupil correction amount and a wiring line in the peripheral circuit that is not shifted are connected, the method comprising the steps of
forming a plurality of wiring lines in the imaging area and a plurality of wiring lines in the peripheral circuit in different layers; and
connecting pairs of the wiring lines through a connection expanded portion integrally formed with both of the wiring lines, and wherein the connection expanded portion extends in a direction generally perpendicular to the wiring from which it extends and being in a same wiring level as the wiring from which it extends, and further wherein a connection expanded portion is integrally formed with each of a plurality of wiring lines of the imaging area and a plurality of wiring lines of the peripheral circuit such that the connection expanded portions are designed to have at least a partial overlap for adjacent ones of the imaging area wiring lines and the peripheral circuit wiring lines.
7. A method of manufacturing a solid-state imaging device including an imaging area that includes arrayed pixels having photoelectric converting units and transistor elements and a peripheral circuit, in which a wiring line in the imaging area that is shifted based on a pupil correction amount and a wiring line in the peripheral circuit that is not shifted are connected, the method comprising the step of:
forming a plurality of wiring lines in the imaging area and a plurality of wiring lines in the peripheral circuit with adjacent ones being connected to each other through a connection expanded portion, and wherein the connection expanded portion extends in a direction generally perpendicular to the wiring from which it extends and being in a same wiring level as the wiring from which it extends, and further wherein a connection expanded portion is integrally formed with each of a plurality of wiring lines of the imaging area and a plurality of wiring lines of the peripheral circuit such that the connection expanded portions are designed to have at least a partial overlap for adjacent ones of the imaging area wiring lines and the peripheral circuit wiring lines.
8. A camera module comprising:
a solid-state imaging device; and
an optical lens system, wherein
the solid-state imaging device includes an imaging area that includes arrayed pixels having photoelectric converting units and transistor elements and a peripheral circuit, a wiring line in the imaging area that is shifted based on a pupil correction amount and a wiring line in the peripheral circuit that is not shifted being connected through a connection expanded portion integrally formed with one or both of the wiring lines, and wherein the connection expanded portion extends in a direction generally perpendicular to the wiring from which it extends and being in a same wiring level as the wiring from which it extends, and further wherein a connection expanded portion is integrally formed with each of a plurality of wiring lines of the imaging area and a plurality of wiring lines of the peripheral circuit such that the connection expanded portions are designed to have at least a partial overlap for adjacent ones of the imaging area wiring lines and the peripheral circuit wiring lines.