Semiconductor integrated circuit apparatus
View Patent ↗A semiconductor integrated circuit apparatus relates to a structured ASIC that wires functional cells in a common wiring layer, which is not dependent on a user circuit and common to several sorts, and a customized layer provided over the common wiring layer to form the user circuit. In the semiconductor integrated circuit apparatus, a functional cell constituting a sequential circuit such as a flip-flop and a functional cell constituting a combinational circuit are placed in matrix of column and row. Further, the functional cell constituting the sequential circuit is placed obliquely in the matrix.
1. A semiconductor integrated circuit apparatus wiring functional cells in a common layer, which is not dependent on a user circuit and common to several sorts, and a customized layer provided over the common layer to form the user circuit, the semiconductor integrated circuit apparatus
comprising:
an internal circuit area divided in a plurality of segments in matrix;
a plurality of first functional cells for a sequential circuit disposed obliquely in the internal circuit area;
a plurality of second functional cells for a circuit other than the sequential circuit placed in a part of the internal circuit area other than the part the first functional cells are placed, and to be wired with the first cell in the customized layer.
2. The semiconductor integrated circuit apparatus according to claim 1 , wherein the second functional cells are placed on top, bottom, left and right segments of the first functional cells.
3. The semiconductor integrated circuit apparatus according to claim 1 , wherein the first functional cells are placed next to each other.
4. The semiconductor integrated circuit apparatus according to claim 1 , wherein the plurality of first functional cells are placed consecutively or intermittently in oblique.
5. The semiconductor integrated circuit apparatus according to claim 1 ,
wherein the internal circuit area is polygon shape, and
the plurality of first functional cells are placed in oblique along with a diagonal of the internal circuit area.
6. The semiconductor integrated circuit apparatus according to claim 1 , wherein the plurality of first functional cells are placed having predetermined intervals in the same row of the internal circuit area.
7. The semiconductor integrated circuit apparatus according to claim 1 , wherein the plurality of first functional cells are placed having predetermined intervals in a same column of the internal circuit area.
8. The semiconductor integrated circuit apparatus according to claim 1 , wherein the sequential circuit is a flip-flop or a latch.
9. The semiconductor integrated circuit apparatus according to claim 1 , wherein a general-purpose logic cell is included in the second functional cell.
10. The semiconductor integrated circuit apparatus according to claim 1 , wherein the semiconductor integrated circuit apparatus is a structured ASIC.
11. A semiconductor integrated circuit apparatus wiring functional cells in a common layer, which is not dependent on a user circuit and common to several sorts, and a customized layer provided over the common layer to form the user circuit, the semiconductor integrated circuit apparatus comprising:
an internal circuit area divided in a plurality of segments in matrix;
a plurality of first functional cells for a sequential circuit disposed in the internal circuit area; and
a plurality of second functional cells for a circuit other than the sequential circuit placed in a part of the internal circuit area other than the part the first functional cells are placed;
wherein the second functional cells are placed on top, bottom, left and right segments of the first functional cells.
12. The semiconductor integrated circuit apparatus according to claim 11 , wherein the plurality of first functional cells are placed in the internal circuit area obliquely.
13. The semiconductor integrated circuit apparatus according to claim 12 , wherein the plurality of first functional cells are placed consecutively or intermittently in oblique.
14. The semiconductor integrated circuit apparatus according to claim 11 , wherein the plurality of first functional cells are placed having predetermined intervals in a same row of the internal circuit area.
15. The semiconductor integrated circuit apparatus according to claim 11 , wherein the plurality of first functional cells are placed having predetermined intervals in a same column of the internal circuit area.
16. The semiconductor integrated circuit apparatus according to claim 11 , wherein the sequential circuit is a flip-flop or a latch.
17. The semiconductor integrated circuit apparatus according to claim 11 , wherein a general-purpose logic cell is included in the second functional cell.
18. The semiconductor integrated circuit apparatus according to claim 11 , wherein the semiconductor integrated circuit apparatus is a structured ASIC.