Memory circuit with automatic precharge function, and integrated circuit device with automatic internal command function
View Patent ↗A memory circuit requiring refresh operations a first circuit which receives a command in synchronization with a clock signal, and which generates a first internal command internally and a second circuit which generates a second internal command, e.g., a refresh command, internally in a prescribed refresh cycle. And an internal circuit, according to said first internal command, executes corresponding control through clock-synchronous operations, and when said refresh command is issued, sequentially executes control corresponding to the refresh command and control corresponding to said first internal command through clock-asynchronous operations. When a refresh timing signal is generated, the refresh operation can be intrupted among the external command operations.
1. An integrated circuit device operating in synchronous with a clock signal, comprising:
a first circuit which generates a first internal command internally according to a command externally received;
a second circuit which generates a second internal command internally, in a prescribed cycle larger than the cycles of an external command cycle; and
an internal circuit which includes a first internal operation cycle according to which an internal operation is executed in synchronous with an external operation cycle, and a second internal operation cycle according to which the internal operation is executed in a shorter cycle than the first internal operation cycle;
wherein the internal circuit executes an operation corresponding to the first internal command according to the first internal operation cycle in a normal state, and executes an operation corresponding to the first and second internal commands according to the second operation cycle during a prescribed period after generation of the second internal command.