IP Library Granted Patent US 8,144,701
Granted Patent B2
US 8,144,701 · App. 11/794,504 · Granted Mar 27, 2012

Method and device of frame number encoding for synchronization of electronic devices

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,144,701
App. No.
11/794,504
Granted
Mar 27, 2012
Kind
B2
Abstract

The present invention proposes a methodology implementable in form of a hardware or software module for coding and decoding a frame number. Firstly a method for encoding an original frame number for synchronization of communication between electronic devices resulting in an encoded compact frame number is provided. Additionally the corresponding decoding method is provided. Further devices and modules adapted to execute the steps of said methods are provided.

Claims (51)

1. A method for forming an encoded compact frame number (cfn), comprising:

providing an original frame number (ofn) to an encoder, wherein said original frame number in binary representation comprises a number of ofn bits including a first group of bits (cfn−k), wherein k is an integer value, and a second group of bits;

defining an index (i) on the basis of said first group of cfn−k bits of said original frame number;

extracting at least one sliding bit from said second group of bits of said original frame number in accordance with said index; and

forming said encoded compact frame number by composing said at least one extracted sliding bit and said first group of cfn−k bits.

2. Method according to claim 1 , wherein k satisfies 0<k<ofn.

3. Method according to claim 1 , wherein said first group of cfn−k bits and said second group of bits are consecutive bits.

4. Method according to claim 1 , further comprising sending the encoded compact frame number, and repetitively executing said method including the sending, wherein said original frame number is varied.

5. Method according to claim 1 , wherein said encoded compact frame number is represented by said first group of cfn−k bits of said binary represented original frame number if an overflow of said index is detected.

6. Method according to claim 5 , wherein said overflow occurs if the condition specified by i<((ofn−cfn)−k) is false for said index i.

7. Method according to claim 1 , wherein said index is binary represented by said first group of cfn−k bits of said original frame number.

8. Method according to claim 1 , wherein said sliding bit has a position relative to a 2 cfn−k bit position in said binary represented original frame number.

9. Method according to claim 8 , wherein k satisfies 0<k<ofn.

10. Computer program product, comprising program code sections stored on a non-transitory machine-readable medium for carrying out the steps of claim 1 , when said computer program product is run on a processor-based device, a terminal device, a network device, a portable terminal, a consumer electronic device, or a mobile communication enabled terminal.

11. A method for deriving a decoded frame number (ofn), comprising:

providing an encoded compact frame number (cfn) to a decoder, wherein said encoded compact frame number is binary represented by a number of cfn bits;

determining an index value (i) by determining a first group of bits (cfn−k), wherein k is an integer value, of said encoded compact frame number, wherein said index value i represents a sliding index;

extracting at least one sliding bit from a second group of bits of said encoded compact frame number; and

deriving said decoded frame number by assigning said first group of cfn−k bits to said decoded frame number in accordance with predefined bit indices defining a first group of bits of said decoded frame number and by including said at least one sliding bit into said decoded frame number within a second group of bits in accordance with said sliding index.

12. Method according to claim 11 , wherein said providing is done by receiving of said said at least one sliding number from a sender.

13. Method according to claim 11 , wherein said index value i is binary represented by said first group of cfn−k bits of said encoded frame number.

14. Method according to claim 11 , further comprising detecting a index overflow if the condition specified by i<((ofn−cfn)−k) for said index value i is false.

15. Method according to claim 14 , wherein said deriving is executed by assigning said first group of cfn−k bits into said decoded frame number in accordance with predefined bit indices if said index overflow is detected.

16. Method according to claim 11 , further comprising receiving said encoded compact frame number and accumulating said decoded frame number.

17. Method according to claim 11 , wherein k satisfies 0<k<ofn.

18. Module for forming an encoded compact frame number (cfn), comprising:

a generator circuit for providing an original frame number (ofn), wherein said original frame number in binary representation comprises a number of ofn bits including a first group of bits (cfn−k), wherein k is an integer value, and a second group of bits;

an indicator circuit for defining an index (i) on the basis of said first group of cfn−k bits of said original frame number;

an extractor circuit for extracting at least one sliding bit from said second group of bits of said original frame number in accordance with said index;

a composer circuit for forming said encoded compact frame number by composing said at least one extracted sliding bit and said first group of cfn−k bits; and

a sender circuit for sending said encoded compact frame number.

19. Module for deriving a decoded frame number (ofn), comprising:

a receiver circuit for providing an encoded compact frame number (cfn), wherein said encoded compact frame number is binary represented by a number of cfn bits;

a processor configured to determine an index value (i) by determining a first group of bits (cfn−k), wherein k is an integer value, of said encoded compact frame number, wherein said index value i represents a sliding index;

an extractor circuit for extracting at least one sliding bit from said encoded compact frame number; and

the processor is further configured to derive said decoded frame number by assigning said first group of cfn−k bits to said decoded frame number in accordance with predefined bit indices defining a first group of bits of said decoded frame number and by including said at least one sliding bit into said decoded frame number within a second group of bits in accordance with said sliding index.

20. A device comprising:

at least one processor; and

at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the device at least to

provide an original frame number (ofn), wherein the original frame number in binary representation comprises a number of ofn bits including a first group of bits (cfn−k), wherein k is an integer value, and a second group of bits;

define an index (i) on the basis of the first group of cfn−k bits of said original frame number;

extract at least one sliding bit from the second group of bits of said original frame number in accordance with said index i;

form an encoded compact frame number (cfn) by composing said at least one extracted sliding bit and said first group of cfn−k bits; and

send said encoded compact frame number.

21. A device comprising:

at least one processor; and

at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the device at least to

receive an encoded compact frame number (cfn), wherein said encoded compact frame number is binary represented by a number of cfn bits;

determine an index value (i) by determining a first group of bits (cfn−k), wherein k is an integer value, of said encoded compact frame number, wherein said index value i represents a sliding index;

extract at least one sliding bit from said encoded compact frame number; and

derive a decoded frame number by assigning said first group of cfn−k bits into said decoded frame number in accordance with predefined bit indices and by including said at least one sliding bit into said decoded frame number within a second group of bits in accordance with said sliding index.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Jun 3, 2021
From: TERRIER SSC, LLC
To: WSOU INVESTMENTS, LLC
Reel/Frame 056526/0093 →
SECURITY INTEREST Recorded Jun 1, 2021
From: WSOU INVESTMENTS, LLC
To: OT WSOU TERRIER HOLDINGS, LLC
Reel/Frame 056990/0081 →
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: OCO OPPORTUNITIES MASTER FUND, L.P. (F/K/A OMEGA CREDIT OPPORTUNITIES MASTER FUND LP
To: WSOU INVESTMENTS, LLC
Reel/Frame 049246/0405 →
SECURITY INTEREST Recorded May 20, 2019
From: WSOU INVESTMENTS, LLC
To: BP FUNDING TRUST, SERIES SPL-VI
Reel/Frame 049235/0068 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2017
From: NOKIA TECHNOLOGIES OY
To: WSOU INVESTMENTS, LLC
Reel/Frame 043953/0822 →
SECURITY INTEREST Recorded Sep 21, 2017
From: WSOU INVESTMENTS, LLC
To: OMEGA CREDIT OPPORTUNITIES MASTER FUND, LP
Reel/Frame 043966/0574 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2015
From: NOKIA CORPORATION
To: NOKIA TECHNOLOGIES OY
Reel/Frame 035570/0946 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2008
From: RANTA, JUKKA
To: NOKIA CORPORATION
Reel/Frame 020977/0282 →