Method of manufacturing a semiconductor device including epitaxially growing semiconductor epitaxial layers on a surface of semiconductor substrate
View Patent ↗A semiconductor device has a first MOS transistor formed on first active region of the first conductivity type, having first gate electrode structure, first source/drain regions, recesses formed in the first source/drain regions, and semiconductor buried regions buried and grown on the recesses for applying stress to the channel under the first gate electrode structure, and a second MOS transistor formed on second active region of the second conductivity type, having second gate electrode structure, second source/drain regions, and semiconductor epitaxial layers formed on the second source/drain regions without forming recesses and preferably applying stress to the channel under the second gate electrode structure. In a CMOS device, performance can be improved by utilizing stress and manufacture processes can be simplified.
1. A semiconductor device manufacture method comprising the steps of:
(a) forming a first active region of a first conductivity type and a second active region of a second conductivity type in a semiconductor substrate;
(b) forming first and second gate electrode structures on said first and second active regions, respectively;
(c) epitaxially growing semiconductor epitaxial layers of the first conductivity type on a surface of said semiconductor substrate in said first and second active regions on both sides of, and spaced by a predetermined distance from, said first and second gate electrode structures;
(d) executing ion implantation for forming source/drain regions at least in said second active region via said epitaxial layers;
(e) masking said second active region, removing portions of said semiconductor epitaxial layers on both sides of, and spaced by a predetermined distance from, said first gate electrode structure, and digging said first active region from a surface thereof to form recesses; and
(f) epitaxially growing semiconductor buried regions of the second conductivity type, said semiconductor buried regions burying said recesses and applying stress to a channel under said first gate electrode structure.
2. The semiconductor device manufacture method according to claim 1 , wherein said step (f) epitaxially grows said semiconductor buried regions to a level higher than a surface of said semiconductor substrate.
3. The semiconductor device manufacture method according to claim 2 , wherein said step (c) forms first sidewall spacers on sidewalls of said first and second gate electrode structures and forms semiconductor epitaxial layers of the first conductivity type on said first and second active regions outside said first sidewall spacers.
4. The semiconductor device manufacture method according to claim 3 , wherein:
said step (e) covers said second active region with an insulating film mask, etches said semiconductor epitaxial layers of the first conductivity type on said first active region outside said first sidewall spacers, and then etches said first active region; and
said step (f) performs epitaxial growth in a state that said second active region is covered with said insulating film mask.
5. The semiconductor device manufacture method according to claim 4 , further comprising the step of:
(g) after said step (f), forming an upper layer insulating film covering said insulating film mask on said substrate, and executing anisotropic etching to form second sidewall spacers on said first sidewall spacers, and partially covering said semiconductor epitaxial layers of the first conductivity type and said semiconductor buried regions of the second conductivity type.
6. The semiconductor device manufacture method according to claim 5 , further comprising the step of:
(h) forming a silicide layer on surfaces of said semiconductor epitaxial layers of the first conductivity type and said semiconductor buried regions of the second conductivity type, outside said second sidewall spacers.
7. The semiconductor device manufacture method according to claim 1 , wherein:
said step (b) forms said gate electrode structures each including a lamination of a gate insulating film, a gate electrode layer and an insulating cap layer; and
said step (c) forms a lamination of a first dielectric layer and a second dielectric layer having different etching characteristics on said semiconductor substrate, the lamination covering said first and second gate electrode structures, anisotropically etches said lamination to leave first sidewall spacers on sidewalls of said first and second gate electrodes, laterally control-etches said first dielectric films exposed at a lower part of said first sidewall spacers, and thereafter epitaxially grows semiconductor of the first conductivity type on said first and second active regions to form epitaxial layers having a first height on said gate electrode structure side and a second height higher then the first height at positions remote from said gate electrode structures.
8. The semiconductor device manufacture method according to claim 7 , wherein after said step (c), said step (e) covers said second active region with a mask, etches and removes said epitaxial layers outside said first sidewall spacers in said first active region, and etches and digs said exposed first active region.
9. The semiconductor device manufacture method according to claim 8 , further comprising the steps of:
(i) after said step (f), removing said first sidewall spacers;
(j) forming second sidewall spacers on sidewalls of said first and second gate electrode structures, said second sidewall spacers partially covering said semiconductor epitaxial layers and said semiconductor buried regions; and
(k) forming a silicide layer on surfaces of said semiconductor epitaxial layers and said semiconductor buried regions outside said second sidewall spacers.