IP Library Granted Patent US 7,770,082
Granted Patent B2
US 7,770,082 · App. 11/797,527 · Granted Aug 3, 2010

Semiconductor integrated circuit and test method therefor

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Quick Facts
Patent No.
US 7,770,082
App. No.
11/797,527
Granted
Aug 3, 2010
Kind
B2
Abstract

A first path for directly inputting a control signal from the outside to a data signal processor and a second path for inputting a control signal generated by a bus interface to the data signal processor can be selectively switched by a switching portion. At the test time of a timing controller, the first path is selected by the switching portion so that the control signal is directly input to the data signal processor without being passed through the bus interface having a slow operation clock, and thus the timing controller can be reliably tested. At the normal use time, the second path is selected by the switching portion, thereby the control signal is input via the bus interface to various kinds of processors such as the data signal processor, and thus the normal operation can be reliably treated.

Claims (13)

1. A semiconductor integrated circuit comprising:

a data signal processor for processing an input image signal on the basis of an input control signal;

a control bus portion that has an operating clock slower than that of the data signal processor, for processing an input signal from outside of the circuit to generate a control signal and for outputting the generated control signal to the data signal processor;

a first path for inputting a predetermined control signal from outside of the circuit to the data signal processor without passing the predetermined control signal through the control bus portion;

a second path for inputting the generated control signal to the data signal processor;

a switching portion for selectively switching the first path and the second path; and

an input terminal electrically connected to the data signal processor, for inputting at least a part of the input image signal to the data signal processor, and for inputting the predetermined control signal when the first path is selected by the switching portion.

2. The semiconductor integrated circuit according to claim 1 , wherein the semiconductor integrated circuit is a timing controller.

3. A method of supplying a signal for testing a semiconductor integrated circuit comprising a data signal processor for processing an input image signal on the basis of an input control signal; and a control bus portion that has an operating clock slower than that of the data signal processor,

the control bus portion processing an input signal from outside of the circuit to generate a control signal and outputting the generated control signal to the data signal processor, the method comprising:

providing an input terminal for inputting at least a part of the input image signal to the data signal processor; and

inputting, via the input terminal, a predetermined control signal from outside of the circuit to the data signal processor without passing the predetermined control signal through the control bus portion.

4. The method according to claim 3 , wherein the semiconductor integrated circuit is a timing controller.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072209/0001 →
MERGER AND CHANGE OF NAME Recorded Jul 2, 2025
From: JAPAN DISPLAY EAST INC.; JAPAN DISPLAY CENTRAL INC.
To: JAPAN DISPLAY INC.
Reel/Frame 071787/0434 →
CHANGE OF NAME Recorded Jun 8, 2012
From: TOSHIBA MATSUSHITA DISPLAY TECHNOLOGY CO., LTD.
To: TOSHIBA MOBILE DISPLAY CO., LTD.
Reel/Frame 028339/0273 →
CHANGE OF NAME Recorded Jun 8, 2012
From: TOSHIBA MOBILE DISPLAY CO., LTD.
To: JAPAN DISPLAY CENTRAL INC.
Reel/Frame 028339/0316 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2007
From: TERANISHI, KENTARO
To: TOSHIBA MATSUSHITA DISPLAY TECHNOLOGY CO., LTD.
Reel/Frame 019343/0173 →