IP Library Granted Patent US 8,949,583
Granted Patent B1
US 8,949,583 · App. 11/799,448 · Granted Feb 3, 2015

Concurrent atomic execution

Inventors: Gil Tene (Los Altos Hills, CA); Ivan Posva (Menlo Park, CA); Michael A. Wolf (San Francisco, CA); Daniel Dwight Grove (San Jose, CA); Tom Kraljevic (San Jose, CA)
Assignee: Azul Systems, Inc.
G06F9/3842G06F9/3863
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Quick Facts
Patent No.
US 8,949,583
App. No.
11/799,448
Granted
Feb 3, 2015
Kind
B1
Abstract

Executing a set one or more instructions is disclosed. A set of one or more register states is saved in a software data structure. The set of instructions is speculatively executed. At least one store made to a memory location during the speculative execution is not committed until the speculative execution is successfully completed. If an abort indication is received, the state of one or more registers restored.

Claims (50)

1. A method of executing a set one or more instructions, including:

determining, based on at least in part on a synchronization state of an object associated with the set of instructions, whether the set of instructions should be executed speculatively, wherein prior to determining whether the set of instructions should be executed speculatively, determining that speculation is not active on the set of instructions and determining whether the object should be thin locked;

saving in a software data structure, one or more states of one or more saved state source registers, wherein the software data structure is not stored in a register file;

speculatively executing the set of instructions, wherein at least one store made to a memory location during the speculative execution is not committed until the speculative execution is successfully completed and speculatively executing the set of instructions includes modifying one or more of the one or more saved state source registers, wherein a previous state of the one or more saved state source registers is saved in the software data structure; and

restoring one or more states of the one or more saved state source registers to one or more of the one or more states saved in the software data structure if an abort indication is received, wherein the abort indication triggering copying of the one or more of the one or more states saved in the software data structure to one or more of the one or more saved state source registers is received before the set of instructions is entirely speculatively executed;

wherein saving the set of one or more saved state source register states in the software data structure, speculatively executing the set of instructions, and restoring the state of one or more saved state source registers are performed in the event that the indication indicates that the set of instructions should be executed speculatively.

2. A method as recited in claim 1 , further including saving a continuation program address in memory.

3. A method as recited in claim 2 , wherein the continuation program address includes a continuation program counter.

4. A method as recited in claim 2 , wherein the continuation program address is associated with a set of one or more operations specific to a site.

5. A method as recited in claim 2 , wherein the continuation program address is associated with a set of one or more instructions for restoring a set of registers.

6. A method as recited in claim 2 , wherein the continuation program address is common to multiple sites.

7. A method as recited in claim 2 , wherein restoring includes starting execution from the continuation program address.

8. A method as recited in claim 1 , further including saving a stack position in memory.

9. A method as recited in claim 1 , further including reading lock information associated with synchronization data after speculation has begun.

10. A method as recited in claim 9 , wherein the lock information is read before speculatively executing the set of instructions.

11. A method as recited in claim 9 , wherein the lock information can be used to determine whether a synchronization mechanism has been exclusively acquired.

12. A method as recited in claim 11 , wherein the synchronization mechanism includes at least one of the following: a lock, a mutex, a semaphore, an object associated with a Java Virtual Machine monitor, an object associated with a Java synchronized method, an object associated with a Java synchronized block, an object associated with a .NET synchronized method, and an object associated with a .NET SyncBlock.

13. A method as recited in claim 9 , wherein reading lock information includes determining whether a synchronization mechanism has been exclusively acquired.

14. A method as recited in claim 1 , further including determining whether an object associated with the instructions is locked.

15. A method as recited in claim 1 , wherein the number of saved state source registers to restore is saved.

16. A method as recited in claim 1 , wherein an indication of which saved state source registers to restore is saved.

17. The method of claim 1 , wherein the synchronization state is configurable to be associated with a thin lock state, a thick lock state, or a speculative state.

18. The method of claim 1 , wherein prior to determining whether the set of instructions should be executed speculatively

determining whether there is an inflated lock on the object.

19. The method of claim 1 , wherein the set of one or more instructions is configured to modify one or more of the saved state source registers in the event the set of one or more instructions is executed non-speculatively.

20. A system for executing a set one or more instructions, including:

a processor configured to:

determine, based on at least in part on a synchronization state of an object associated with the set of instructions, whether the set of instructions should be executed speculatively, wherein prior to determining whether the set of instructions should be executed speculatively, determine that speculation is not active on the set of instructions and determine whether the object should be thin locked;

save in a software data structure, one or more states of one or more saved state source registers, wherein the software data structure is not stored in a register file;

speculatively execute the set of instructions, wherein at least one store made to a memory location during the speculative execution is not committed until the speculative execution is successfully completed and speculatively executing the set of instructions includes modifying one or more of the one or more saved state source registers, wherein a previous state of the one or more saved state source registers is saved in the software data structure; and

restore one or more states of the one or more saved state source registers to one or more of the one or more states saved in the software data structure if an abort indication is received, wherein the abort indication triggering copying of the one or more of the one or more states saved in the software data structure to one or more of the one or more saved state source registers is received before the set of instructions is entirely speculatively executed;

wherein saving the set of one or more saved state source register states in the software data structure, speculatively executing the set of instructions, and restoring the state of one or more saved state source registers are performed in the event that the indication indicates that the set of instructions should be executed speculatively; and

a memory coupled with the processor, wherein the memory provides the processor with instructions.

21. A system as recited in claim 20 , wherein the processor is further configured to save a continuation program address in memory.

22. A system as recited in claim 20 , wherein the processor is configured to restore at least in part by starting execution from the continuation program address.

23. A system as recited in claim 20 , wherein the processor is further configured to save a stack position in memory.

24. A system as recited in claim 20 , wherein the processor is further configured to read lock information associated with synchronization data after speculation has begun.

25. A system as recited in claim 20 , wherein the processor is further configured to determine whether an object associated with the instructions is locked.

26. A system as recited in claim 20 , wherein an indication of which saved state source registers to restore is saved.

27. A computer program product for executing a set one or more instructions, the computer program product being embodied in a non-transitory computer readable medium and comprising computer instructions for:

determining, based on at least in part on a synchronization state of an object associated with the set of instructions, whether the set of instructions should be executed speculatively, wherein prior to determining whether the set of instructions should be executed speculatively, determining that speculation is not active on the set of instructions and determining whether the object should be thin locked;

saving in a software data structure, one or more states of one or more saved state source registers, wherein the software data structure is not stored in a register file;

speculatively executing the set of instructions, wherein at least one store made to a memory location during the speculative execution is not committed until the speculative execution is successfully completed and speculatively executing the set of instructions includes modifying one or more of the one or more saved state source registers, wherein a previous state of the one or more saved state source registers is saved in the software data structure; and

restoring one or more states of the one or more saved state source registers to one or more of the one or more states saved in the software data structure if an abort indication is received, wherein the abort indication triggering copying of the one or more of the one or more states saved in the software data structure to one or more of the one or more saved state source registers is received before the set of instructions is entirely speculatively executed;

wherein saving the set of one or more saved state source register states in the software data structure, speculatively executing the set of instructions, and restoring the state of one or more saved state source registers are performed in the event that the indication indicates that the set of instructions should be executed speculatively.

28. A computer program product as recited in claim 27 , the computer program product further comprising computer instructions for saving a continuation program address in memory.

29. A computer program product as recited in claim 27 , wherein restoring includes starting execution from the continuation program address.

30. A computer program product as recited in claim 27 , the computer program product further comprising computer instructions for saving a stack position in memory.

31. A computer program product as recited in claim 27 , the computer program product further comprising computer instructions for reading lock information associated with synchronization data after speculation has begun.

32. A computer program product as recited in claim 27 , the computer program product further comprising computer instructions for determining whether an object associated with the instructions is locked.

Assignments (7)
SECURITY INTEREST Recorded Dec 3, 2025
From: AZUL SYSTEMS, INC.
To: ARES CAPITAL CORPORATION, AS COLLATERAL AGENT
Reel/Frame 073828/0083 →
RELEASE OF SECURITY INTERESTS IN PATENTS RECORDED AT REEL/FRAME 052293/0121 Recorded Dec 3, 2025
From: GOLUB CAPITAL LLC, AS COLLATERAL AGENT
To: AZUL SYSTEMS, INC.
Reel/Frame 073466/0064 →
RELEASE OF SECURITY INTEREST Recorded Apr 2, 2020
From: SILICON VALLEY BANK
To: AZUL SYSTEMS, INC.
Reel/Frame 052293/0869 →
SECURITY INTEREST Recorded Apr 2, 2020
From: AZUL SYSTEMS, INC.
To: GOLUB CAPITAL LLC, AS COLLATERAL AGENT
Reel/Frame 052293/0121 →
RELEASE OF SECURITY INTEREST Recorded Feb 21, 2019
From: PARTNERS FOR GROWTH IV, L.P.
To: AZUL SYSTEMS, INC.
Reel/Frame 048411/0138 →
SECURITY INTEREST Recorded Mar 1, 2016
From: AZUL SYSTEMS, INC.
To: PARTNERS FOR GROWTH IV, L.P.
Reel/Frame 037959/0694 →
SECURITY INTEREST Recorded Feb 2, 2016
From: AZUL SYSTEMS, INC.
To: SILICON VALLEY BANK
Reel/Frame 037641/0665 →
Continuity (2)
Continuation 11227422 · Sep 14, 2005
Provisional Application 60610028 · Sep 14, 2004