Globally synchronized timestamp value counter
View Patent ↗The present invention relates to a synchronized timestamp mechanism in a packet processing system. This synchronized timestamp mechanism provides a globally synchronized counter value so counters located on separate packet processing cards can be synchronized. The synchronizing of these packet processing cards provides tracking of how long it takes for packets to be processed, provides the ability to generate packet headers that include sequence numbers for robust header compression, and allows the use of encryption protocols without a time reference signal. The synchronization is provided by sending the cards with counter value information and this information can be used to update the card's internal counter value information so that the card is synchronized with other cards.
1. A time synchronization system comprising:
a plurality of cards residing in a chassis, the chassis running software that selects, from the plurality of cards, a card to be the master card, the plurality of cards each including a clock source and a counter,
wherein the master card transmits on a first bus line, asynchronously and serially on a regular periodic basis, counter value information to the plurality of cards including to the master card,
wherein one or more of the plurality of cards includes one of a packet accelerator card, a packet services card, a telephony services card, and a switch processing card,
wherein one or more of the plurality of cards includes one of an access gateway, a packet data serving node, a foreign agent, a home agent, a base station, an access network, and a session control function, and
wherein the master card further transmits counter value information to the plurality of cards on a second bus line.
2. The system of claim 1 , wherein each of the plurality of cards calculates parity of the counter value information and compares this parity with parity information calculated by the master card.
3. The system of claim 1 , wherein the chassis is for providing a packet data serving node (PDSN).
4. The system of claim 1 , wherein one of the plurality of cards updates its counter value with the counter value information received from the master card.
5. A method of synchronizing comprising:
designating one of a plurality of cards residing in a chassis to be a master card;
generating clock information and counter value information at the master and transmitting the counter value information to the plurality of cards on each of a first and a second bus line, including to the master card; and
updating at least one of the plurality of cards with the counter value information received from the master card,
wherein one or more of the plurality of cards includes one of a packet accelerator card, a packet services card, a telephony services card, and a switch processing card.
6. A method of synchronizing comprising:
designating one of a plurality of cards residing in a chassis to be a master card;
generating clock information and counter value information at the master and transmitting the counter value information to the plurality of cards on each of a first and a second bus line, including to the master card; and
updating at least one of the plurality of cards with the counter value information received from the master card,
further comprising generating a timestamp for tagging a packet using a counter at one of the plurality of cards that has been updated.
7. The method of claim 5 , further comprising:
one of the cards other than the master card calculating parity information from the counter value information; and
comparing the calculated parity information with parity information received from the master card.
8. The method of claim 5 , wherein the chassis is for providing a packet data serving node (PDSN).
9. A time synchronization system comprising:
means for providing a plurality of cards residing in a means for providing a chassis;
the means for providing a chassis running software that selects a master card from the means for providing a plurality of cards; and
the master card including a clock source and means for providing a counter, wherein the master card transmits on each of a first and a second bus line on a regular periodic basis counter value information to the means for providing a plurality of cards including the master card,
wherein the means for providing a chassis is for providing a packet data serving node (PDSN) functionality and wherein one or more of the means for providing a plurality of cards includes a packet accelerator card, a packet services card, a telephony services card, and a switch processing card.
10. The system of claim 9 , wherein the means for providing a plurality of cards calculates parity of the counter value information and compares this parity with parity information calculated by the master card.
11. The system of claim 9 , wherein one of the means for providing a plurality of cards updates its counter value with the counter value information received from the master card.
12. The system of claim 1 , wherein the plurality of cards continues operating without synchronization with the master card if the master card becomes unavailable until a new master card is selected.
13. A time synchronization system comprising:
a plurality of cards residing in a chassis;
the chassis running software that selects, from the plurality of cards, a card to be the master card;
the plurality of cards each including a clock source and a counter,
wherein the master card further transmits counter value information to the plurality of cards on a second bus line,
wherein the master card transmits on a first bus line, asynchronously and serially on a regular periodic basis, counter value information to the plurality of cards including to the master card,
wherein each of the plurality of cards calculates parity of the counter value information and compares this parity with parity information calculated by the master card, and
wherein the plurality of cards sends a notification to the chassis when a parity problem occurs.
14. The system of claim 4 , wherein the plurality of cards updates its counter value with the counter value information received from the master card on the second bus line when a parity problem occurs on the first bus line.
15. The method of claim 5 , further comprising operating without synchronization with the master card at the plurality of cards if the master card becomes unavailable until a new master card is selected.
16. A method of synchronizing comprising:
designating one of a plurality of cards residing in a chassis to be a master card;
generating clock information and counter value information at the master and transmitting the counter value information to the plurality of cards on each of a first and a second bus line, including to the master card;
updating at least one of the plurality of cards with the counter value information received from the master card, one of the cards other than the master card calculating parity information from the counter value information;
comparing the calculated parity information with parity information received from the master card, and
sending a notification to the chassis when a parity problem occurs.
17. The method of claim 5 , further comprising updating at least one of the plurality of cards with the counter value information received from the master card on the second bus line when a parity problem occurs on the first bus line.
18. The system of claim 9 , wherein one of the means for providing a plurality of cards continues operating without synchronization with the master card if the master card becomes unavailable until a new master card is selected.
19. The system of claim 10 , wherein one of the means for providing a plurality of cards sends a notification to the means for providing a chassis when a parity problem occurs.
20. The system of claim 11 , wherein one of the means for providing a plurality of cards updates its counter value with the counter value information received from the master card on the second bus line when a parity problem occurs on the first bus line.