Semiconductor device
A semiconductor device having a self test function includes a memory, a first data processing portion connected to a former stage of the memory through a first path, a second data processing portion connected to a latter stage of the memory through a second path, a failure detecting circuit for detecting a failure of the first data processing portion, the first path, the memory, the second path and the data processing portion by using a test pattern, a normal path provided on an input side of the first data processing portion and serving to transmit a signal to the first data processing portion in a normal operation of the semiconductor device, a first test path provided on the input side of the first data processing portion and serving to transmit a test pattern output from the failure detecting circuit in a test operation of the semiconductor device, and a selecting and output portion for selecting either a signal input through the normal path or a signal input through the first test path and outputting the same signal to the first data processing portion.
1 . A semiconductor device having a self test function, comprising:
a memory for storing data;
a first data processing portion connected to a former stage of the memory through a first path for transmitting a signal;
a second data processing portion connected to a latter stage of the memory through a second path for transmitting a signal;
a failure detecting circuit for detecting a failure of the first data processing portion, the first path, the memory, the second path and the data processing portion by using a test pattern;
a normal path provided on an input side of the first data processing portion and serving to transmit a signal to the first data processing portion in a normal operation of the semiconductor device;
a first test path provided on the input side of the first data processing portion and serving to transmit the test pattern output from the failure detecting circuit in a test operation of the semiconductor device; and
a selecting and output portion for selecting either a signal input through the normal path or a signal input through the first test path and outputting the same signal to the first data processing portion.
2 . The semiconductor device according to claim 1 , wherein the first data processing portion includes a flip-flop to which the signal output from the selecting and output portion is input.
3 . The semiconductor device according to claim 1 , wherein the data read from the memory are transmitted to the failure detecting circuit through the second path and the second data processing portion, and a second test path for transmitting a signal in the test operation of the semiconductor device.
4 . The semiconductor device according to claim 3 , wherein the second data processing portion includes a flip-flop for outputting the data read from the memory to the second test path.
5 . The semiconductor device according to claim 1 , wherein the failure detecting circuit detects a delay failure.