Methods and apparatus for fabricating carbon nanotubes and carbon nanotube devices
Methods and apparatus for fabricating carbon nanotubes (CNTs) and carbon nanotube devices. These include a method of fabricating self-aligned CNT field-effect transistors (FET), a method and apparatus of selectively etching metallic CNTs and a method and apparatus of fabricating an oxide in a carbon nanotube (CNT) device. These methods and apparatus overcome many of the disadvantages and limitations of the prior art.
1 . A method of fabricating self-aligned carbon nanotube field-effect transistors (FET), comprising:
providing a substrate that is fabricated from a ultraviolet (UV) radiation transparent material;
placing one or more carbon nanotubes (CNTs) on a front-side of the substrate;
depositing a UV radiation-opaque material on a portion of the CNTs as FET drain and source;
applying photoresist (PR) on a portion of the CNTs not covered by Uv radiation-opaque material and on top of the UV radiation-opaque material;
illuminating a bottom-side of the substrate with UV radiation, whereby the UV radiation passes through the substrate and exposes a portion of the PR to the UV radiation;
developing the UV radiation-exposed PR, whereby the developed PR is removed;
depositing a bi-layer;
defining a FET gate; and
applying a PR mask.
2 . The method of claim 1 further comprising:
masking a portion of the one or more nanotubes with PR prior to depositing the UV radiation-opaque material; and
lifting-off the PR mask after depositing the UV radiation-opaque material.
3 . The method of claim 1 wherein the providing provides a quartz substrate.
4 . The method of claim 1 wherein the placing grows the one or more CNTs on the front-side of the substrate.
5 . The method of claim 1 wherein the depositing the UV radiation-opaque material deposits Titanium (Ti) as the drain and source.
6 . The method of claim 1 wherein the depositing the UV radiation-opaque material deposits Gold (Au) as the drain and source.
7 . The method of claim 1 wherein the depositing a bi-layer deposits a barrier layer and gate metal.
8 . The method of claim 7 wherein the barrier layer is chosen from a list consisting of: Aluminum Oxide (Al 2 O 3 ), Titanium Oxide (TiO 2 ) and Silicon Oxide (SiO 2 ).
9 . The method of claim 7 wherein the gate metal is chosen from a list consisting of: Ti and Au.
10 . The method of claim 1 wherein the defining the gate metal comprises etching the gate metal
11 . The method of claim 1 further comprising lifting-off the deposited bi-layer.
12 . A CNT FET manufactured according to the method of claim 1 .
13 . The method of claim 1 in which the placing one or more CNTs on the substrate surface places a plurality of CNTs on the substrate surface including semi-conducting CNTs and metallic CNTs, the method further comprising:
depleting conduction electrons in the semi-conducting CNTs, whereby at least some of the semi-conducting CNTs are prevented from conducting; and
burning out the metallic CNTs.
14 . A method of selectively etching metallic carbon nanotubes (CNTs), comprising:
providing a substrate;
placing a plurality of CNTs on a surface of the substrate, in which the CNTs include semi-conducting CNTs and metallic CNTs;
depleting conduction electrons in the semi-conducting CNTs, whereby at least some of the semi-conducting CNTs are prevented from conducting; and
burning out the metallic CNTs.
15 . The method of claim 14 in which depleting conduction electrons comprises:
applying an insulating layer on the CNTs;
applying a conducting layer on the insulating layer; and
applying a voltage to the conducting layer so that the conducting layer is biased to a sufficient voltage to deplete conduction electrons in the semi-conducting CNTs are depleted.
16 . The method of claim 15 in which the applying a voltage biases the conducting layer to a sufficient voltage to prevent all of the semi-conducting CNTs from conducting.
17 . The method of claim 15 in which the applying a voltage biases the conducting layer to a sufficient voltage to prevent only the most responsive semi-conducting CNTs from conducting.
18 . The method of claim 15 in which the applying an insulating layer applies an insulating polymer.
19 . The method of claim 18 in which the insulating polymer is Teflon or photoresist.
20 . The method of claim 15 in which the applying a conducting layer deposits a metallic film.
21 . The method of claim 15 in which the applying a conducting layer spins-on a conducting photoresist.
22 . The method of claim 15 further comprising:
connecting an electrical contact to the conducting layer;
providing a voltage source connected to the electrical contact, whereby the voltage source applies the voltage to the conducting layer.
23 . The method of claim 14 in which the burning out the metallic CNTs further includes burning out some of the semi-conducting CNTs.
24 . The method of claim 14 in which the burning out the metallic CNTs comprises:
providing a microwave source;
applying microwave radiation to the CNTs, whereby microwave radiation causes the metallic CNTs to conduct current until burning out.
25 . The method of claim 14 further comprising removing the insulating layer and the conducting layer.
26 . The method of claim 25 in which removing the insulating layer and the conducting layer comprises soaking the insulating layer and the conducting layer in acetone.
27 . An electrical device comprising CNTs selectively etched according to claim 14 .
28 . The method of claim 14 in which the substrate is ultraviolet (UV) radiation transparent, the method further comprising:
depositing a UV radiation-opaque material on a portion of the CNTs as FET drain and source;
applying photoresist (PR) on a portion of the CNTs not covered by UV radiation-opaque material and on top of the UV radiation-opaque material;
illuminating a bottom-side of the substrate with UV radiation, whereby the UV radiation passes through the substrate and exposes a portion of the PR to the UV radiation;
developing the UV radiation-exposed PR, whereby the developed PR is removed;
depositing a bi-layer;
defining a FET gate; and
applying a PR mask.
29 . The method of claim 14 in which placing the CNTs on the substrate surface comprises growing the CNTs on the substrate surface.
30 . An apparatus for selectively etching metallic carbon nanotubes (CNTs), comprising:
a substrate;
a plurality of CNTs including metallic CNTs and semi-conducting CNTs;
an insulating layer;
a conducting layer;
a voltage source, in which the voltage source bias the conducting layer so as to deplete the semi-conducting CNTs of conduction electrons; and
a microwave source, in which the microwave source applies microwave radiation to the CNTs, causing the metallic CNTs to conduct current until burning out.
31 . The apparatus of claim 30 further comprising an electrical contact connecting the voltage source to the conducting layer.
32 . A method of fabricating an oxide in a carbon nanotube (CNT) device, comprising:
providing a substrate;
depositing an anodizable metal layer on a surface of the substrate placing one or more CNTs on the anodizable metal layer; and
anodizing the anodizable metal layer beneath the one or more CNTs, whereby an oxide layer is created beneath the one or more CNTs.
33 . The method of claim 32 in which the anodizing comprises:
providing an anode;
placing the anodizable metal layer and the anode into an electrolytic solution; and
applying a voltage to the anode and the anodizable metal layer.
34 . The method of claim 33 in which the electrolytic solution is ammonium 35 .
35 . The method of claim 32 further comprising providing a voltage source connected to the anodizable metal layer.
36 . The method of claim 32 in which the anodizable metal layer is niobium.
37 . The method of claim 32 in which the oxide layer is niobium oxide.
38 . The method of claim 32 in which placing the one or more CNTs on the substrate surface comprises growing the one or more CNTs on the anodizable metal layer.
39 . The method of claim 32 in which only a portion of the anodizable metal layer is anodized, leaving an unanodized metal layer.
40 . The method of claim 32 further comprising defining a gate layer.
41 . The method of claim 32 further comprising defining a drain and source layer.
42 . The method of claim 41 in which the defining a drain and source layer comprises depositing and lifting off titanium or gold.
43 . The method of claim 32 in which the providing a substrate provides a quartz substrate.
44 . A CNT device fabricated according to the method of claim 32 .
45 . The method of claim 32 in which the placing places a plurality of CNTs on the anodizable metal layer, in which the CNTs include semi-conducting CNTs and metallic CNTS, the method further comprising:
depleting conduction electrons in the semi-conducting CNTs, whereby at least some of the semi-conducting CNTs are prevented from conducting; and
burning out the metallic CNTs.
46 . The method of claim 45 in which depleting conduction electrons comprises:
applying an insulating layer on the CNTs;
applying a conducting layer on the insulating layer; and
applying a voltage to the conducting layer so that the conducting layer is biased to a sufficient voltage to deplete conduction electrons in the semi-conducting CNTs are depleted.
47 . The method of claim 45 in which the substrate is ultraviolet (UV) radiation transparent, the method further comprising:
depositing a UV radiation-opaque material on a portion of the CNTs as FET drain and source;
applying photoresist (PR) on a portion of the CNTs not covered by UV radiation-opaque material and on top of the UV radiation-opaque material;
illuminating a bottom-side of the substrate with UV radiation, whereby the UV radiation passes through the substrate and exposes a portion of the PR to the UV radiation;
developing the UV radiation-exposed PR, whereby the developed PR is removed;
depositing a bi-layer;
defining a FET gate; and
applying a PR mask.
48 . An apparatus for fabricating an oxide in a carbon nanotube (CNT) device, comprising:
a substrate;
an anodizable metal layer on a surface of the substrate;
one or more CNTs placed on the anodizable metal layer;
an anode;
a electrolytic solution submerging the anode and the anodizable metal layer; and
a voltage source connected to the anode and the anodizable metal layer, in which the voltage source applies a voltage to the anode and the anodizable metal layer, anodizing the anodizable metal layer to produce an oxide beneath the one or more CNTs.