Semiconductor device
The semiconductor device is equipped with a logic circuit such as a memory; a self test circuit for self-testing the logic circuit; a critical path defined up to the logic circuit; a test path defined from the self test circuit up to the logic circuit; a delay circuit provided on the test path, to which a delay value equivalent to a delay value of the critical path is set; and a selecting/outputting circuit for selecting any one of a signal inputted via the critical path and another signal inputted via the test path and for outputting the selected signal.
1 . A semiconductor device having a self test function, comprising:
a failure detecting circuit for detecting a failure of a logic circuit by employing a test pattern;
a critical path defined up to said logic circuit;
a test path defined from said failure detecting circuit up to said logic circuit;
a delay circuit provided on the test path, to which a delay value equivalent to a delay value of said critical path is set; and
a selecting/outputting circuit for selecting any one of a signal inputted via the critical path and another signal inputted via the test path and for outputting the selected signal; wherein:
said selecting/outputting circuit outputs the signal entered via the critical path when said semiconductor device is operated under normal operation, and outputs the signal entered via said test path and said delay circuit when said semiconductor device is operated under self test operation.
2 . The semiconductor device as claimed in claim 1 wherein said delay value of the critical path is obtained by a timing analysis.
3 . The semiconductor device as claimed in claim 1 wherein the delay value set to said delay circuit is variable.
4 . The semiconductor device as claimed in claim 3 wherein said delay circuit includes a storage unit for storing thereinto said set delay value.
5 . The semiconductor device as claimed in claim 1 , further comprising:
an output terminal for switching current levels of the signals outputted from said selecting/outputting unit.
6 . The semiconductor device as claimed in claim 1 wherein said logic circuit is a memory.
7 . The semiconductor device as claimed in claim 1 , wherein said logic circuit is provided inside said semiconductor device.
8 . The semiconductor device as claimed in claim 1 wherein said failure of said logic circuit detected by said failure detecting circuit contains a delay failure.