Semiconductor device and method of fabricating semiconductor device
Surge current, which flows-in from an exterior due to ESD or the like, is prevented from directly flowing-into a supporting substrate. A semiconductor device has: an element-isolating insulating film sectioning an SOI layer into an active region and a field region; a resistance element formed at the field region; one or more layers of an interlayer insulating films formed on an SOI substrate; a ground terminal for a substrate contact formed on the interlayer insulating film; a substrate contact passing through the element-isolating insulating film and a BOX layer, and electrically connected to the supporting substrate; a first wire electrically connecting the substrate contact and the resistance element; and a second wire electrically connecting the resistance element and the ground terminal for a substrate contact.
1 . A semiconductor device comprising:
an SOI substrate including a supporting substrate, an insulating film on the supporting substrate, and a semiconductor layer on the insulating film;
an element-isolating insulating film sectioning the semiconductor layer into an element forming region and an element isolating region;
a resistance element formed at the element isolating region;
one or more layers of an interlayer insulating film formed on the SOI substrate;
a first terminal formed on the interlayer insulating film;
a substrate contact passing through the element-isolating insulating film and the insulating film, and electrically connected to the supporting substrate;
a first wire electrically connecting the substrate contact and the resistance element; and
a second wire electrically connecting the resistance element and the first terminal.
2 . The semiconductor device of claim 1 , wherein the resistance element is a polysilicon film.
3 . The semiconductor device of claim 2 , wherein the polysilicon film is formed on the element-isolating insulating film.
4 . The semiconductor device of claim 1 , wherein the resistance element is a transistor or a diffusion region formed at the semiconductor layer which remains at a portion of the element isolating region.
5 . The semiconductor device of claim 1 , wherein a resistance value of the resistance element is greater than or equal to 2 kΩ.
6 . A semiconductor device comprising:
an SOI substrate including a supporting substrate, an insulating film on the supporting substrate, and a semiconductor layer on the insulating film;
an element-isolating insulating film sectioning the semiconductor layer into an element forming region and an element isolating region;
a resistance element formed at the element isolating region;
one or more layers of an interlayer insulating film formed on the SOI substrate;
a first terminal formed on the interlayer insulating film;
a substrate contact passing through the element-isolating insulating film and the insulating film, and electrically connected to the supporting substrate, a junction resistance of the substrate contact and the supporting substrate being greater than or equal to 2 kΩ;
a first wire electrically connecting the substrate contact and the resistance element; and
a second wire electrically connecting the resistance element and the first terminal.
7 . The semiconductor device of claim 1 , further comprising:
a semiconductor element formed at the semiconductor layer;
a second terminal formed on the interlayer insulating film;
a third wire electrically connecting the second terminal and the semiconductor element; and
a fourth wire electrically connecting the second wire and a region from the resistance element to the first terminal.
8 . The semiconductor device of claim 7 , further comprising:
a third terminal formed on the interlayer insulating film;
a fifth wire electrically connecting the third terminal and the semiconductor element; and
a protecting circuit connected in parallel to the semiconductor element, between the second terminal and the third terminal.
9 . The semiconductor device of claim 8 , wherein the third wire is a wire formed on the interlayer insulating film of an uppermost layer among the one or more layers of the interlayer insulating film.
10 . The semiconductor device of claim 1 , further comprising:
a third terminal formed on the interlayer insulating film and adjacent to the first terminal,
wherein the resistance element is formed between the first terminal and the third terminal.
11 . A method of fabricating a semiconductor device comprising:
preparing an SOI substrate which includes a supporting substrate, an insulating film on the supporting substrate, and a semiconductor layer on the insulating film;
sectioning the semiconductor layer into an element forming region and an element isolating region by forming an element-isolating insulating film at the semiconductor layer;
forming a first transistor at the element forming region, and forming a resistance element at the element isolating region;
forming an interlayer insulating film on the semiconductor layer at which the first transistor and the resistance element are formed;
forming a substrate contact which passes through the interlayer insulating film, the element-isolating insulating film and the insulating film, and which is electrically connected to the supporting substrate; and
respectively forming a first wire, which electrically connects the substrate contact and the resistance element, and a second wire, which electrically connects the resistance element and the first transistor.
12 . The method of fabricating a semiconductor device of claim 11 , wherein the resistance element is a polysilicon film formed on the element-isolating insulating film.
13 . The method of fabricating a semiconductor device of claim 11 , wherein the element isolating region has, at a portion thereof, a first region at which the element-isolating insulating film is not formed, and
the resistance element is a second transistor or an impurity diffusion region formed at the first region.
14 . The method of fabricating a semiconductor device of claim 11 , wherein a plurality of layers of the interlayer insulating film are formed, and
the second wire electrically connects the resistance element and the first transistor via a wire which is formed on the interlayer insulating film of an uppermost layer among the plurality of interlayer insulating films.