IP Library Granted Patent US 8,035,134
Granted Patent B2
US 8,035,134 · App. 11/812,698 · Granted Oct 11, 2011

Forward body bias-controlled semiconductor integrated circuit

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Quick Facts
Patent No.
US 8,035,134
App. No.
11/812,698
Granted
Oct 11, 2011
Kind
B2
Abstract

In a first functional block, a source voltage input terminal of a PMOS transistor and a substrate voltage input terminal of an NMOS transistor are connected to their voltage supply terminals, respectively. The substrate voltage input terminal of the PMOS transistor in the i th (1≦i≦n−1) functional block and the source voltage input terminal of the NMOS transistor therein are connected bijectively with the source voltage input terminal of the PMOS transistor in the i+1 th functional block and the substrate voltage input terminal of the NMOS transistor therein. In the n th functional block, the substrate voltage input terminal of the PMOS transistor and the source voltage input terminal of the NMOS transistor are connected to their voltage supply terminals, respectively.

Claims (25)

1. A semiconductor integrated circuit including a plurality of functional blocks, wherein:

a substrate voltage input terminal of an insulated-gate field effect transistor of a first conductivity type included in a first functional block and a source voltage input terminal of an insulated-gate field effect transistor of a second conductivity type included in the first functional block are respectively connected with a substrate voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included in a second functional block and a source voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in the second functional block; and

a plurality of constant voltage circuits, each of which supplies predetermined voltages to a substrate voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in one of the plurality of functional blocks or to a source voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included in the one of the plurality of functional blocks,

wherein at least one of the plurality of constant voltage circuits includes four voltage output terminals connected to the source voltage input terminals and the substrate voltage input terminals of the insulated-gate field effect transistors of the first and second conductivity types included in one of the plurality of functional blocks, respectively, and a voltage selected according to an input signal is output from each of the four voltage output terminals.

2. A semiconductor integrated circuit including a plurality of functional blocks, wherein:

a substrate voltage input terminal of an insulated-gate field effect transistor of a first conductivity type included in a first functional block and a source voltage input terminal of an insulated-gate field effect transistor of a second conductivity type included in the first functional block are respectively connected with a substrate voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included in a second functional block and a source voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in the second functional block, wherein:

at least one of the plurality of functional blocks has a triple-well structure including a semiconductor substrate of a first one of the first and second conductivity types with a retrograde well of a second one of the first and second conductivity types being formed on the semiconductor substrate, and with a well of the first one of the first and second conductivity types being formed on the retrograde well, and

the retrograde well is insulated from the semiconductor substrate by an insulating layer.

3. A semiconductor integrated circuit including a plurality of functional blocks, wherein:

a substrate voltage input terminal of an insulated-gate field effect transistor of a first conductivity type included in a first functional block and a source voltage input terminal of an insulated-gate field effect transistor of a second conductivity type included in the first functional block are respectively connected with a substrate voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included in a second functional block and a source voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in the second functional block, wherein:

at least one of the plurality of functional blocks includes: a plurality of first lines for supplying a substrate voltage for an insulated-gate field effect transistor of the first conductivity type included in the functional block; and a plurality of second lines for supplying a substrate voltage for an insulated-gate field effect transistor of the second conductivity type included in the functional block,

the first and second lines extend parallel to each other and alternate with each other, with the insulated-gate field effect transistors of the first and second conductivity types being interposed therebetween, and

the at least one function block includes a line control section for thinning out voltages supplied through the plurality of first and second lines according to a magnitude of a forward body bias to be applied to each of the insulated-gate field effect transistors of the first and second conductivity types included in the functional block.

4. A semiconductor integrated circuit including a plurality of functional blocks, wherein:

a substrate voltage input terminal of an insulated-gate field effect transistor of a first conductivity type included in a first functional block and a source voltage input terminal of an insulated-gate field effect transistor of a second conductivity type included in the first functional block are respectively connected with a substrate voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included in a second functional block and a source voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in the second functional block, wherein:

at least one of the plurality of functional blocks includes: a plurality of first lines for supplying a substrate voltage for an insulated-gate field effect transistor of the first conductivity type included in the functional block; and a plurality of second lines for supplying a substrate voltage for an insulated-gate field effect transistor of the second conductivity type included in the functional block,

the first and second lines extend parallel to each other and alternate with each other, with the insulated-gate field effect transistors of the first and second conductivity types being interposed therebetween,

the at least one functional block has a triple-well structure including a semiconductor substrate of one of the first and second conductivity types with a retrograde well of another of the first and second conductivity types being formed on the semiconductor substrate, and with a well of the one of the first and second conductivity types being formed on the retrograde well, and

one of the first and second lines that supplies a substrate voltage to an insulated-gate field effect transistor of another one of the first and second conductivity types is located on the retrograde well outside a region of the well.

5. A semiconductor integrated circuit including a first to a fourth functional blocks, wherein:

a source voltage input terminal of an insulated-gate field effect transistor of a first conductivity type included in the first functional block and a substrate voltage input terminal of an insulated-gate field effect transistor of a second conductivity type included therein are connected to a first and a second voltage supply terminals, respectively;

a substrate voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in an ith (where 1≦i≦3) functional block and a source voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included therein are connected respectively with a source voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in an i+1th functional block and a substrate voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included therein;

a substrate voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in the fourth functional block and a source voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included therein are connected to a third and a fourth voltage supply terminals, respectively;

a substrate voltage input terminal of an insulated-gate field effect transistor of the first conductivity type included in the second functional block and a substrate voltage input terminal of the insulated-gate field effect transistor of the second conductivity type included in the fourth functional block are connected together; and

a source voltage input terminal of an insulated-gate field effect transistor of the second conductivity type included in the second functional block and a source voltage input terminal of the insulated-gate field effect transistor of the first conductivity type included in the fourth functional block are connected together.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0534 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2008
From: SUMITA, MASAYA
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020348/0048 →