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App. No. 11/812,705 · Confirmation No. 3880

Method for designing semiconductor integrated circuit and method of circuit simulation

Abandoned -- Failure to Respond to an Office Action View Publication ↗
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2009-09-16 ABN Abandonment 2 View
2009-01-05 CTNF Non-Final Rejection 6 View
2009-01-05 892 List of references cited by examiner 1 View
2009-01-05 FWCLM Index of Claims 1 View
2009-01-05 SRFW Search information including classification, databases and other search related notes 1 View
2009-01-05 BIB Bibliographic Data Sheet 1 View
2009-01-05 SRNT Examiner's search strategy and results 2 View
2009-01-05 1449 List of References cited by applicant and considered by examiner 3 View
2009-01-05 1449 List of References cited by applicant and considered by examiner 2 View
2008-01-24 NTC.PUB Notice of Publication 1 View
2007-08-06 IDS Information Disclosure Statement (IDS) Form (SB08) 2 View
2007-08-06 FOR Foreign Reference 15 View
2007-08-06 FOR Foreign Reference 18 View
2007-07-19 APP.FILE.REC Filing Receipt 3 View
2007-06-21 TRNA Transmittal of New Application 2 View
2007-06-21 SPEC Specification 22 View
2007-06-21 CLM Claims 5 View
2007-06-21 ABST Abstract 1 View
2007-06-21 DRW Drawings-only black and white line drawings 11 View
2007-06-21 OATH Oath or Declaration filed 3 View
2007-06-21 WFEE Fee Worksheet (SB06) 1 View
2007-06-21 WFEE Fee Worksheet (SB06) 1 View
2007-06-21 IDS Information Disclosure Statement (IDS) Form (SB08) 3 View
2007-06-21 FOR Foreign Reference 15 View
2007-06-21 FOR Foreign Reference 19 View
2007-06-21 FRPR Certified Copy of Foreign Priority Application 33 View
2007-06-21 136A Authorization for Extension of Time all replies 2 View
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Quick Facts
App. No.
11/812,705
Filed
2007-06-21
Pub. No.
US20080021689A1
Examiner
TAT, BINH C
Art Unit
2825