Semiconductor device

1. A semiconductor device in which a plurality of semiconductor chips are mounted on a lead frame and seal portions are provided so as to cover said plurality of semiconductor chips and required portions of said lead frame to be covered,

said plurality of semiconductor chips being divided into a first group of semiconductor chips and a second group of semiconductor chips wherein both groups of semiconductor chips are respectively mounted on one and the other sides of said lead frame in its width direction at a distance from each other,

said seal portions being comprised of first and second resin-seal portions wherein said first and second groups of semiconductor chips are respectively covered along with the required portions of said lead frame to be covered, said first and second resin-seal portions being mechanically coupled with each other by coupling portions,

wherein a gap is formed between said first and second resin-seal portions and the outer lead portions of leads connected to circuits within said first resin-seal portion and the outer lead portions of leads connected to circuits within said second resin-seal portion are drawn out through said gap between said first and second resin-seal portions as lead terminals,

a plurality of leads that form part of said lead frame comprises said coupling portions, wherein both ends of each of said plurality of leads comprising said coupling portions are buried in said first resin-seal portion and in said second resin-seal portion, and

coupling resin-molded portions which cover said plurality of leads comprising said coupling portions are formed so as to bridge said first resin-seal portion and said second resin-seal portion so that said first and second resin-sealed portions are mechanically coupled with each other also by said coupling resin-seal portions.

2. A semiconductor device in which a plurality of semiconductor chips are mounted on a lead frame and seal portions are provided so as to cover said plurality of semiconductor chips and required portions of said lead frame to be covered,

said lead frame including a first group of first to “n”th (“n” is an integer greater than or equal to 1) islands arranged on one end of said lead frame in its width direction in an array in the longitudinal direction of said lead frame and a second group of first to “m”th (“m” is an integer greater than or equal to 1) islands arranged on the other end of said lead frame in its width direction in an array in the longitudinal direction of said lead frame, wherein a group of leads including leads corresponding to each island are arranged in a space formed between said first group of islands and said second group of islands,

said plurality of semiconductor chips being divided into a first group and a second group, wherein said first and second groups of semiconductor chips are respectively mounted on the islands of said lead frame belonging to said first group of islands and on the islands of said lead frame belonging to said second group of islands and

each semiconductor chip mounted on each island and predetermined leads corresponding to each island are connected to each other through wires,

said seal portions being comprised of a first resin-seal portion which covers said first group of semiconductor chips, the islands of said lead frame belonging to said first group of islands and the inner lead portions of leads corresponding to each island belonging to said first group of islands and of a second resin-seal portion which covers said second group of semiconductor chips, the islands of said lead frame belonging to said second group of islands and the inner lead portions of leads corresponding to each island belonging to said second group of islands, and said first resin-seal portion and said second resin-seal portion being mechanically coupled with each other by coupling portions,

wherein a gap is formed between said first resin-seal portion and said second resin-seal portion and the outer lead portions of leads to be connected to an external circuit, among said plurality of leads, are drawn out through said gap between said first resin-seal portion and said second resin-seal portion as lead terminals,

a plurality of leads that form part of said lead frame comprises said coupling portions, wherein both ends of each of said plurality of leads comprising said coupling portions are buried in said first resin-seal portion and in said second resin-seal portion, and

coupling resin-molded portions which cover said plurality of leads comprising said coupling portions are formed so as to bridge said first resin-seal portion and said second resin-seal portion so that said first and second resin-sealed portions are mechanically coupled with each other also by said coupling resin-seal portions.

3. A semiconductor device in which a plurality of semiconductor chips are mounted on a lead frame and seal portions are provided so as to cover said plurality of semiconductor chips and required portions of said lead frame to be covered,

said lead frame including a first group of first to “n”th (“n” is an integer greater than or equal to 1) islands arranged on one end of said lead frame in its width direction in an array in the longitudinal direction of said lead frame and a second group of first to “n”th islands provided on the other end of said lead frame in its width direction so as to respectively pair with said first group of first to “n”th islands, said first and second groups of paired islands being arranged in the width direction of said lead frame at a distance from each other so as to face to each other, wherein a plurality of leads corresponding to each paired islands are arranged in a space formed between said first and second groups of paired islands,

said plurality of semiconductor chips being divided into a first group and a second group, wherein first and second groups of semiconductor chips are respectively mounted on the islands of said lead frame belonging to said first group of islands and on the islands of said lead frame belonging to said second group of islands

and a semiconductor chip mounted on each island and predetermined leads corresponding to each island are connected to each other through wires,

said seal portions being comprised of a first resin-seal portion which covers said first group of semiconductor chips, the islands of said lead frame belonging to said first group of islands and the inner lead portions of leads corresponding to each island belonging to said first group of islands and of a second resin-seal portion which covers said second group of semiconductor chips, the islands of said lead frame belonging to said second group of islands and the inner lead portions of leads corresponding to each island belonging to said second group of islands, and said first resin-seal portion and said second resin-seal portion being mechanically coupled with each other by coupling portions,

wherein a gap is formed between said first resin-seal portion and said second resin-seal portion, and the outer lead portions of leads to be connected to an external circuit, among said plurality of leads, are drawn out through said gap between said first resin-seal portion and said second resin-seal portion as lead terminals,

a plurality of leads that form part of said lead frame comprises said coupling portions, wherein both ends of each of said plurality of leads comprising said coupling portions are buried in said first resin-seal portion and in said second resin-seal portion, and

coupling resin-molded portions which cover said plurality of leads comprising said coupling portions are formed so as to bridge said first resin-seal portion and said second resin-seal portion so that said first and second resin-seal portions are mechanically coupled with each other also by said coupling resin-seal portions.

4. A semiconductor device in which a plurality of semiconductor chips are mounted on a lead frame and seal portions are provided so as to cover said plurality of semiconductor chips and required portions of said lead frame to be covered,

said lead frame including a first group of first to third islands arranged on one end of said lead frame in its width direction in an array in the longitudinal direction of said lead frame and a second group of first to third islands arranged on the other end of said lead frame in its width direction so as to respectively pair with said first group of first to third islands, said first and second groups of paired islands being arranged in the width direction of said lead frame at a distance from each other so as to face to each other, wherein a plurality of leads corresponding to each paired islands are arranged in a space formed between said first and second groups of paired islands,

said plurality of semiconductor chips including first to third diodes, fourth to sixth diodes the anodes thereof being connected in common and the cathodes thereof being respectively connected to the anodes of said first to third diodes, thereby comprising a diode bridge three-phase full-wave rectifier circuit in conjunction with said first to third diodes, and first to third thyristors respectively connected in reverse parallel to said fourth to sixth diodes and simultaneously triggered when the input terminals of said rectifier circuit are short-circuited in order to regulate the output voltage of said rectifier circuit,

said first to third diodes being mounted with the respective anodes thereof directly connected to said second group of first to third islands of said lead frame,

said fourth to sixth diodes being mounted with the respective anodes thereof directly connected to said first group of first to third islands of said lead frame,

said first to third thyristors being mounted with the respective anodes thereof directly connected to said second group of first to third islands,

wherein semiconductor chips mounted on respective islands respectively belonging to said first group and said second group and predetermined leads corresponding to each island are connected to each other through wires,

said seal portions being comprised of a first resin-seal portion which covers said first group of first to third islands, semiconductor chips mounted on these islands, and the inner lead portions of leads corresponding to said respective islands belonging to said first group and of a second resin-seal portion which covers said second group of first to third islands, semiconductor chips mounted on these islands, and the inner lead portions of leads corresponding to said respective islands belonging to said second group, and said first resin-seal portion and said second resin-seal portion being mechanically coupled with each other by coupling portions,

wherein a gap is formed between said first resin-seal portion and said second resin-seal portion and the outer lead portions of leads to be connected to an external circuit, among said plurality of leads, are drawn out through said gap between said first resin-seal portion and said second resin-seal portion as lead terminals,

a plurality of leads that form part of said lead frame comprises said coupling portions, wherein both ends of each of said plurality of leads comprising said coupling portions are buried in said first resin-seal portion and in said second resin-seal portion, and

coupling resin-molded portions which cover said plurality of leads comprising said coupling portions are formed so as to bridge said first resin-seal portion and said second resin-seal portion so that said first and second resin-sealed portions are mechanically coupled with each other also by said coupling resin-seal portions.