IP Library Granted Patent US 7,685,707
Granted Patent B2
US 7,685,707 · App. 11/814,037 · Granted Mar 30, 2010

Method for manufacturing circuit forming substrate

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Quick Facts
Patent No.
US 7,685,707
App. No.
11/814,037
Granted
Mar 30, 2010
Kind
B2
Abstract

A stable and high quality circuit forming substrate is provided even when the work size is increased in the circuit forming substrate. In a stacking step, prepregs that are B stage substrate materials, are arranged lined with respect to a first metal foil, and stacked on the first metal foil. A C stage substrate material is stacked on the B stage substrate materials. Further, the prepregs that are two or more B stage substrate materials, are stacked on the C stage substrate material and a second metal foil is stacked thereon.

Claims (38)

1. A method for manufacturing a circuit forming substrate, comprising:

positioning, arranging side by side, and temporary holding a plurality of first B stage state substrate materials on an upper surface of a first metal foil;

positioning, mounting, and temporary holding a C stage state substrate material on upper surfaces of the plurality of first B stage state substrate materials;

positioning, mounting, and temporary holding a plurality of second B stage state substrate materials on an upper surface of the C stage state substrate material; and

mounting and temporary holding a second metal foil on upper surfaces of the plurality of second B stage state substrate materials.

2. The method according to claim 1 , further comprising:

after said positioning, arranging side by side, and temporary holding the plurality of first B stage state substrate materials, after said positioning, mounting, and temporary holding the C stage state substrate material, after said positioning, mounting, and temporary holding the plurality of second B stage state substrate materials, and after said mounting and temporary holding the second metal foil, fixing the first and second metal foils, a side surface of one of the plurality of first B stage state substrate materials, a side surface of one of the plurality of second B stage state substrate materials, and a side surface of the C stage state substrate material with a temporary holding member.

3. The method according to claim 1 , wherein a clearance dimension between the plurality of first B stage state substrate materials is in a range of 3 mm to 0.2 mm in said positioning, arranging side by side, and holding the plurality of first B stage state substrate materials.

4. The method according to claim 1 , wherein the plurality of first B stage state substrate materials and the plurality of second B stage state substrate materials are B stage state prepregs, and are formed into two or more portions by being divided from that having a thickness of not more than 100 μm and a short side of a rectangular shape exceeding 350 mm, or that having a thickness of not more than 60 μm and one side exceeding 200 mm.

5. The method according to claim 1 , wherein each of the plurality of first B stage state substrate materials includes a woven cloth for reinforcement material.

6. The method according to claim 1 ,

wherein the C stage state substrate material includes

a first circuit provided at the upper surface of the C stage state substrate material,

a second circuit provided at a lower surface of the C stage state substrate material, and

an inter-layer connecting part formed by conductive paste between the upper surface and the lower surface of the C stage state substrate material to connect the first circuit to the second circuit.

7. The method according to claim 6 , further comprising:

forming a laser via in one of the plurality of B stage state substrate materials, the laser via being connected to the first circuit.

8. The method according to claim 1 , wherein at least one of the plurality of B stage state substrate materials includes an inter-layer connecting part in said positioning, arranging side by side, and temporary holding the plurality of first B stage state substrate materials.

9. The method according to claim 1 , wherein a clearance dimension between the plurality of second B stage state substrate materials is in a range of 3 mm to 0.2 mm in said positioning, arranging side by side, and temporary holding the plurality of second B stage state substrate materials.

10. A method for manufacturing a circuit forming substrate, comprising:

stacking a plurality of C stage state substrate materials side by side on an upper surface of a B stage state substrate material; and

stacking the B stage state substrate material on an upper surface of a metal foil.

11. The method according to claim 10 ,

wherein said circuit forming substrate includes a plurality of assembled circuit forming substrates each including a plurality of individual circuit forming substrates, and

wherein, in said stacking the plurality of C stage state substrate materials side by side on the upper surface of the B stage state substrate material, the plurality of C stage state substrate materials contact each other at a position between individual circuit forming substrates adjacent to each other out of the plurality of individual circuit forming substrates in at least one assembled circuit forming substrate.

12. The method according to claim 10 , further comprising:

cutting and dividing a C stage state substrate material into the plurality of C stage state substrate materials before said stacking the plurality of C stage state substrate materials.

13. The method according to claim 12 , wherein said cutting and dividing the C stage state substrate material into the plurality of C stage state substrate materials comprises cutting and dividing the C stage state substrate material by a dicing method.

14. The method according to claim 10 ,

wherein one of the plurality of C stage state substrate materials includes

a first circuit provided at an upper surface of said one of the plurality of the C stage state substrate materials,

a second circuit provided at a lower surface of said one of the plurality of the C stage state substrate materials, and

an inter-layer connecting part formed by conductive paste between the lower surface and the upper surface of said one of the plurality of C stage state substrate materials.

15. The method according to claim 14 , further comprising:

forming a laser via in the B stage state substrate material, the laser via being connected to the second circuit.

16. The method according to claim 10 ,

wherein the plurality of C stage state substrate materials contact each other, and

wherein portions of the plurality of C stage state substrate materials that contact each other have shapes fit to each other.

Assignments (2)
CHANGE OF NAME Recorded Nov 11, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021818/0725 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2007
From: NISHII, TOSHIHIRO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020138/0928 →