Receiver comprising an amplifier
View Patent ↗The invention relates to a receiver ( 1 ) comprising an amplifier ( 31 - 34 ) for amplifying an antenna signal, which amplifier ( 31 - 34 ) comprises an amplifier input ( 11 a ) and an amplifier output ( 12 a ,12 b ), the amplifier input ( 11 a ) being a single ended input for receiving the antenna signal, the amplifier output ( 12 a , 12 b ) being a differential output, and the amplifier ( 31 - 34 ) comprising circuit ( 41,42 ) for reducing a common mode input impedance of the amplifier ( 31 - 34 ).
1. A receiver comprising an amplifier for amplifying an antenna signal, which amplifier comprises:
an amplifier input and an amplifier output,
the amplifier input being a single ended input for receiving the antenna signal,
the amplifier output being a differential output,
the amplifier further comprising a first transistor and a second transistor, control electrodes of both transistors being coupled to each other via a first element, and
said first element comprising a circuit for reducing a common mode input impedance of the amplifier.
2. The receiver according to claim 1 , wherein first main electrodes of both transistors are coupled to each other via a second element.
3. The receiver according to claim 2 , the first element comprising a differential inductor with a center tap and having a coupling factor k, with 0.5<k<1.0.
4. The receiver according to claim 3 , the center tap being coupled to a voltage source.
5. The receiver according to claim 2 , second main electrodes of both transistors being coupled to a cascade circuit comprising the amplifier output.
6. The receiver according to claim 2 , a control electrode of the first transistor being coupled via a first capacitor to the amplifier input, and a control electrode of the second transistor being coupled via a second capacitor to ground.
7. The receiver according to claim 6 , both capacitors having different values.
8. Amplifier for amplifying an antenna signal in a receiver, which amplifier comprises:
an amplifier input and an amplifier output,
the amplifier input being a single ended input for receiving the antenna signal,
the amplifier output being a differential output,
the amplifier further comprising a first transistor and a second transistor, control electrodes of both transistors being coupled to each other via a first element, and
said first element comprising a circuit for reducing a common mode input impedance of the amplifier.
9. The receiver according to claim 1 wherein the circuit for reducing a common mode input impedance of the amplifier comprises a circuit simulating a differential inductor with a center tap.
10. The amplifier according to claim 8 , wherein first main electrodes of both transistors are coupled to each other via a second element.
11. The amplifier according to claim 10 , the first element comprising a differential inductor with a center tap and having a coupling factor k, with 0.5<k<1.0.
12. The amplifier according to claim 11 , the center tap being coupled to a voltage source.
13. The amplifier according to claim 10 , second main electrodes of both transistors being coupled to a cascade circuit comprising the amplifier output.
14. The amplifier according to claim 10 , a control electrode of the first transistor being coupled via a first capacitor to the amplifier input, and a control electrode of the second transistor being coupled via a second capacitor to ground.
15. The amplifier according to claim 14 , both capacitors having different values.
16. The amplifier according to claim 8 wherein the circuit for reducing a common mode input impedance of the amplifier comprises a circuit simulating a differential inductor with a center tap.