Granted Patent B2

US 7,746,176 · App. 11/815,966 · Granted Jun 29, 2010

Abstract

Claims (26)

1. A receiver comprising an amplifier configured to amplify an antenna signal, which amplifier comprises an amplifier input and an amplifier output, the amplifier input being a single ended input configured to receive the antenna signal, the amplifier output being a differential output, and the amplifier comprising a circuit configured to compensate a series input impedance of the amplifier.

2. A receiver according to claim 1 , the amplifier comprising a first transistor and a second transistor, control electrodes of both transistors being coupled to each other via a first element, first main electrodes of both transistors being coupled to each other via a second element, and the circuit configured to compensate being coupled to the first element.

3. A receiver according to claim 2 , the circuit comprising a third transistor, a control electrode of the third transistor being coupled to a control electrode of the second transistor, a first main electrode of the third transistor being coupled to ground via a parallel circuit of a current source and a capacitor, a second main electrode of the third transistor being coupled to a voltage supply.

4. A receiver according to claim 2 , second main electrodes of both transistors being coupled to a cascode circuit comprising the amplifier output.

5. A receiver according to claim 2 , the first element comprising a differential inductor with a center tap.

6. A receiver according to claim 5 , the center tap being coupled to a voltage source.

7. A receiver according to claim 2 , a control electrode of the first transistor being coupled via a further capacitor to the amplifier input.

8. An amplifier configured to amplify an antenna signal in a receiver, which amplifier comprises an amplifier input and an amplifier output, the amplifier input being a single ended input configured to receive the antenna signal, the amplifier output being a differential output, and the amplifier comprising a means for compensating a series input impedance of the amplifier.

9. A method of amplifying an antenna signal in a receiver, the method comprising:

receiving an antenna signal at a single-ended input of an amplifier;

compensating a series input impedance of the amplifier during amplification of the antenna signal; and

outputting the amplified antenna signal at a differential output of the amplifier.

10. A method in accordance with claim 9 wherein compensating a series input impedance of the amplifier comprises providing a negative input resistance.

11. A method in accordance with claim 9 wherein compensating a series input impedance of the amplifier occurs in an absence of a noise generating resistor.

12. A method in accordance with claim 9 wherein compensating a series input impedance of the amplifier obtains an input power match.

13. A method in accordance with claim 9 wherein the amplifier comprises a first transistor and a second transistor, a first element coupling control electrodes of the first and second transistors to each other, and a second element coupling first main electrodes of the first and second transistors to each other, and wherein a circuit configured to compensate a series input impedance of the amplifier is coupled to the first element.

14. A method in accordance with claim 13 wherein the circuit comprises a third transistor, the third transistor comprising:

a control electrode coupled to a control electrode of the second transistor,

a first main electrode coupled to ground via a parallel circuit of a current source and a first capacitor, and

a second main electrode coupled to a voltage supply.

15. A method in accordance with claim 13 wherein second main electrodes of the first and second transistors are coupled to a cascode circuit comprising the differential output of the amplifier.

16. A method in accordance with claim 13 wherein the first element comprises a differential inductor with a center tap.

17. A method in accordance with claim 16 wherein the center tap is coupled to a voltage source.

18. A method in accordance with claim 13 wherein the first element comprises two serial inductors.

19. A method in accordance with claim 18 wherein the common point of the two serial inductors is coupled to a voltage source.

20. A method in accordance with claim 13 wherein a control electrode of the first transistor is coupled to the single-ended amplifier input via a second capacitor.

Assignments (14)