Semiconductor device and method of designing the same
View Patent ↗A plurality of internal circuits ( 11 to 14 ) are formed on a semiconductor chip 10 , and receive different power supply voltages. An ESD protection circuit ( 15 ) is connected to the power supply lines ( 31 to 34 ) for the internal circuits ( 11 to 14 ). The area in which the protection circuit ( 15 ) is formed is closer to the center of the semiconductor chip ( 10 ) than the areas for the internal circuits ( 11 to 14 ). Surge voltages applied to the power supply pads reach the protection circuit before reaching the reaching the internal circuits.
1. A semiconductor device comprising:
a plurality of internal circuits formed on a semiconductor chip and receiving a plurality of different power supply voltages, said plurality of internal circuits being disposed at positions different along a first direction and also at positions different along a second direction perpendicular to said first direction; and
a protection circuit for ESD protection formed on said semiconductor chip and connected to the power supply lines for said internal circuits;
wherein said protection circuit is disposed between said plurality of internal circuits in said first direction and also between said plurality of internal circuits in said second direction; and
said power supply lines are provided to extend from power supply pads via said protection circuit and to the said internal circuits.
2. The semiconductor device according to claim 1 , wherein the area where said protection circuit is formed is between, along said first direction, the areas where said internal circuits are formed, and also between, along said second direction, the areas where said internal circuits are formed.
3. The semiconductor device according to claim 1 , wherein said protection circuit comprises a protection element for protection against an excessive voltage applied to said power supply pads, and points at which both ends of said protection element are connected to said power supply lines are between said power supply pads and said internal circuits.
4. The semiconductor device according to claim 1 , wherein said pads are provided in the vicinity of the area for said protection circuit.