Drive circuit having plural output amplifiers for driving display cells with delay minimized
A circuit for driving a liquid crystal display includes decoders for receiving input data to display, and output amplifiers correspondingly connected to the decoders for selectively driving display cells. In each output amplifier, the gate electrodes of a first transistor forming one input of a differential amplifier and a second transistor larger than the first transistor are selectively connected or disconnected when input data changes logical state. The drain electrodes of a third transistor forming the other input of the differential amplifier and a fourth transistor larger than the third transistor are selectively connected or disconnected when the input data changes logical state. The differential amplifier output is selectively fed back to the second transistor to charge or discharge the second transistor. Delay on the output of the decoders is reduced to thereby minimize delay on the output of the output amplifiers.
1 . A drive circuit for driving a display device having a plurality of display cells arranged to form a display screen, said drive circuit comprising:
a plurality of decoders operative in response to input data to be displayed and a gamma correction voltage for outputting output signals so as to select appropriate ones of the display cells; and
a plurality of output amplifiers correspondingly connected to said plurality of decoders for amplifying the output signals output from said plurality of decoders to develop drive signals for selectively driving the plurality of display cells on output ports,
each of said plurality of output amplifiers including:
a differential amplifier circuit comprising a first transistor having a first size and forming one input port of said differential amplifier, and a second transistor having a second size larger than the first size;
a first switch selectively connecting or disconnecting said second transistor to or from said first transistor; and
a second switch selectively connecting or disconnecting the output of said output amplifier to or from said second transistor,
said first switch being operative in response to a transition of a logical state of the input data to disconnect said second transistor from said first transistor.
2 . The drive circuit in accordance with claim 1 , wherein said second switch is operative in response to the transition of the logical state of the input data to connect the output port of said output amplifier to said second transistor to cause said second transistor to charge or discharge.
3 . The drive circuit in accordance with claim 1 , wherein the plurality of display cells are liquid crystal display cells arranged in a bi-dimensional matrix.