Programmable high-speed cable with printed circuit board and boost device
An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves.
1. A cable for connecting a transmitting data source device to a receiving data sink device carrying differential signals, comprising:
a printed circuit board (PCB) and a boost device for boosting at least one of the differential signals, the PCB including tracks for providing delays in coupling a raw differential signal from the data source device to two or more inputs of the boost device;
the boost device comprising:
an input circuit for terminating the delayed raw differential signal;
an input selector circuit with first adjustable parameters for selecting a delayed raw differential signal and outputting a recovered signal that is deskewed;
an equalizer circuit with second adjustable parameters for processing the recovered signal into an equalized signal; and
an output circuit for amplifying the equalized signal into a boosted signal and sending the boosted signal to the data sink device.
2. The cable as described in claim 1 , the boost device further including a parameter memory for retaining the first and second adjustable parameters after they have been adjusted.
3. The cable as described in claim 2 , wherein the cable further includes a control bus, and wherein the parameter memory is accessible from said control bus.
4. The cable as described in claim 1 , wherein the input selector circuit for selecting the delayed raw differential signal for adjusting an existing time skew of two polarities of the differential signal is controlled by changing the first adjustable parameters.
5. The cable as described in claim 4 , wherein the equalizer circuit comprises a circuit for adjusting a frequency response of the deskewed signal by changing the second adjustable parameters to produce the equalized signal.
6. The cable as described in claim 5 , wherein the equalizer circuit has at least two settings of the second adjustable parameters for adjusting the frequency response.
7. The cable as described in claim 4 , wherein the PCB comprises a number of tracks providing delays arranged sequentially, and the input selector circuit selecting a composite delay resulting from the tracks that are selected by the input selector circuit.
8. A cable for connecting a transmitting data source device to a receiving data sink device carrying differential signals including:
a printed circuit board (PCB) and a boost device for boosting at least one of the differential signals, the PCB including tracks for providing delays in coupling a raw differential signal from the data source device to two or more inputs of the boost device;
the boost device comprising:
an input circuit for terminating the delayed raw differential signal;
an input selector circuit with first adjustable parameters for selecting a delayed raw differential signal and outputting a recovered signal that is deskewed;
a deskew circuit with second adjustable parameters for processing the recovered and deskewed signal into a further deskewed signal;
an equalizer circuit with third adjustable parameters for processing the further deskewed signal into an equalized signal; and
an output circuit for amplifying the equalized signal into a boosted signal and sending the boosted signal to the data sink device.
9. The cable as described in claim 8 , the boost device further including a parameter memory for retaining the first, second, and third adjustable parameters after they have been adjusted.
10. The cable as described in claim 9 , wherein the cable further includes a control bus, and wherein the parameter memory is accessible from said control bus.
11. The cable as described in claim 8 , wherein the input selector circuit is controlled by changing the first adjustable parameters, and wherein the deskew circuit is an analog differential deskew circuit for further adjusting a remaining time skew of two polarities of the differential signal by changing the second adjustable parameters.
12. The cable as described in claim 11 , wherein the equalizer circuit comprises a circuit for adjusting a frequency response of the deskewed signal by changing the third adjustable parameters to produce the equalized signal.
13. The cable as described in claim 8 , wherein the equalizer circuit has at least two settings of the third adjustable parameters for adjusting the frequency response.
14. The cable as described in claim 11 , wherein the PCB comprises a number of tracks providing delays arranged sequentially, and the input selector circuit selecting a composite delay resulting from the tracks that are selected by the input selector circuit, and wherein the analog differential deskew circuit comprises:
a number of delay units arranged sequentially;
an analog selector, selecting a composite delay resulting from the delay units that are selected by the analog selector; and
analog switches inserting the composite delay into the polarities of the differential signal.
15. The cable as described in claim 14 , wherein the analog switches are inserting the composite delay into one or the other polarity of the differential signal.
16. The cable as described in claim 15 , wherein each of the analog delay units has a gain which is equal to 1.0.
17. The cable as described in claim 16 , wherein each of the analog delay units comprises one or more amplifiers.
18. The cable as described in claim 17 , wherein each analog delay unit comprises:
first and second amplifiers having a common input, which is the input of the analog delay unit, and their outputs being summed to generate the output of the analog delay unit;
the first amplifier having a gain of (1.0−Δ), and a delay equal to a predetermined delay value; and
the second amplifier having a gain of Δ, and the same delay as the first amplifier.
19. The cable as described in claim 18 , wherein the first amplifier is a follower stage.
20. The cable as described in claim 19 , wherein the second amplifier has a shunt capacitor for setting the gain of Δ.