Clock doubler circuit and method
View Patent ↗Apparatus for producing a signal, comprising a capacitor; a first current source for one of charging and discharging the capacitor over a first time period; a second current source for one of discharging and charging the capacitor over a first portion of a second time period; a detector for detecting when the voltage across the capacitor is substantially a first voltage and controlling the second current source for a second portion of the second time period to substantially maintain the voltage across the capacitor; and an apparatus output for indicating when the voltage across the capacitor is one of above and below the first voltage.
1. Apparatus for producing a clock signal, comprising:
an input for receiving a clock signal indicating one of a number of logic states;
a first device for producing a first signal from the clock signal, whereby the first signal has a duty cycle less than a duty cycle of the clock signal;
a clock signal modifier for producing a modified clock signal from the clock signal;
a second device for producing a second signal from the modified clock signal, whereby the second signal has a duty cycle less than the duty cycle of the clock signal; and
a signal combiner for combining the first and second signals to produce a combined signal, whereby the combined signal has a frequency higher than a frequency of the clock signal, wherein at least one of the first and second devices comprises:
a capacitor;
a first current source for one of charging and discharging the capacitor over a first time period determined from the clock signal;
a second current source for one of discharging and charging the capacitor over a first portion of a second time period determined from the clock signal;
a detector for detecting when the voltage across the capacitor is substantially a first voltage and controlling the second current source for a second portion of the second time period to substantially maintain the voltage across the capacitor, wherein the detector comprises a comparator for comparing the voltage across the capacitor with a reference voltage; and
a device output comprising an output from the comparator for at least one of the first signal and the second signal such that the at least one of the first signal and the second signal indicates when the voltage across the capacitor is one of above and below the first voltage.
2. Apparatus as claimed in claim 1 , wherein the at least one of the first and second devices comprises a clock signal input for receiving a clock signal, wherein the first and second time periods are determined from the clock signal.
3. Apparatus as claimed in claim 2 , wherein the at least one of the first and second devices comprises a switch controlled by the clock signal for selectively connecting the first current source to the capacitor to one of charge and discharge the capacitor.
4. Apparatus as claimed in claim 1 , wherein the reference voltage is substantially the first voltage.
5. Apparatus as claimed in claim 1 , wherein the first current source charges the capacitor over the first time period and the second current source discharges the capacitor over the first portion of the second time period.
6. Apparatus as claimed in claim 1 , wherein the first current source discharges the capacitor over the first time period and the second current source charges the capacitor over the first portion of the second time period.
7. A device for producing a signal, comprising:
at least two apparatus as claimed in claim 1 ;
a clock signal input for receiving a clock signal;
at least one clock signal modifier for producing a modified clock signal from the clock signal and providing the modified clock signal to at least one of the at least two apparatus;
a signal combiner for combining the apparatus outputs of the at least two apparatus to produce a combined signal such that the combined signal has a frequency higher than a frequency of the clock signal.