IP Library Granted Patent US 7,570,415
Granted Patent B2
US 7,570,415 · App. 11/835,308 · Granted Aug 4, 2009

MEMS device and interconnects for same

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Quick Facts
Patent No.
US 7,570,415
App. No.
11/835,308
Granted
Aug 4, 2009
Kind
B2
Abstract

A microelectromechanical systems device having an electrical interconnect between circuitry outside the device and at least one of an electrode and a movable layer within the device. A layer of the electrical interconnect is formed directly under, over, or between a partially reflective layer and a transparent layer of the device. The layer of the electrical interconnect preferably comprises nickel.

Claims (58)

1. A peripheral routing region of a microelectromechanical systems device, comprising:

an electrical interconnect comprising a conductive layer comprising a material selected from the group consisting of nickel, copper, chromium, and silver;

a partially reflective layer; and

a transparent conductor, wherein at least a portion of the conductive layer is directly under, directly over, or between the partially reflective layer and the transparent conductor.

2. The peripheral routing region of claim 1 , wherein the transparent conductor is a layer of a lower electrode of the microelectromechanical systems device.

3. The peripheral routing region of claim 2 , wherein the electrical interconnect is configured to be electrically connected to at least one of the lower electrode and a movable conductive layer of the microelectromechanical systems device.

4. The peripheral routing region of claim 2 , wherein the transparent conductor comprises indium tin oxide under the conductive layer.

5. The peripheral routing region of claim 1 , wherein the partially reflective layer comprises chromium.

6. The peripheral routing region of claim 1 , wherein the conductive layer is between the transparent conductor and the partially reflective layer.

7. The peripheral routing region of claim 1 , wherein the partially reflective layer is over and contacting the conductive layer.

8. The peripheral routing region of claim 1 , wherein the conductive layer comprises nickel.

9. The peripheral routing region of claim 8 , further comprising a second nickel layer over the conductive layer.

10. The peripheral routing region of claim 9 , further comprising a reflective layer under the second layer and contacting the electrical interconnect.

11. The peripheral routing region of claim 10 , wherein the reflective layer comprises aluminum.

12. A microelectromechanical systems device, comprising:

an array comprising a lower electrode, a movable upper electrode, and a cavity between the lower electrode and the upper electrode; and

a peripheral region comprising:

a portion of a layer forming the upper electrode in the array; and

a conductive material of an electrical interconnect electrically connected to at least one of the lower electrode and the upper electrode, wherein the conductive material is formed of a layer separate from and below the layer forming the upper electrode in the array, the conductive material comprising a material selected from the group consisting of nickel, chromium, copper, and silver.

13. The microelectromechanical systems device of claim 12 , wherein the lower electrode comprises a transparent conductive layer.

14. The microelectromechanical systems device of claim 13 , wherein the lower electrode further comprises a partially reflective layer and at least a portion of the conductive material in the peripheral region is directly over the transparent conductive layer and the partially reflective layer.

15. The microelectromechanical systems device of claim 13 , wherein the lower electrode further comprises a partially reflective layer and at least a portion of the conductive material in the peripheral region is directly under the transparent conductive layer and the partially reflective layer.

16. The microelectromechanical systems device of claim 13 , wherein the lower electrode further comprises a partially reflective layer and at least a portion of the conductive material in the peripheral region is between the transparent conductive layer and the partially reflective layer.

17. The microelectromechanical systems device of claim 13 , wherein the upper electrode further comprises a nickel layer over an aluminum layer.

18. The microelectromechanical systems device of claim 12 , wherein the upper electrode comprises an aluminum layer.

19. The microelectromechanical systems device of claim 12 , wherein the device is an interferometric modulator.

20. The microelectromechanical systems device of claim 12 , further comprising:

a display;

a processor that is in electrical communication with said display, said processor being configured to process image data;

a memory device in electrical communication with said processor.

21. The microelectromechanical systems device of claim 20 , further comprising:

a driver circuit configured to send at least one signal to said display.

22. The microelectromechanical systems device of claim 21 , further comprising:

a controller configured to send at least a portion of said image data to said driver circuit.

23. The microelectromechanical systems device of claim 20 , further comprising:

an image source module configured to send said image data to said processor.

24. The microelectromechanical systems device of claim 23 , wherein said image source module comprises at least one of a receiver, transceiver, and transmitter.

25. The microelectromechanical systems device of claim 20 , further comprising:

an input device configured to receive input data and to communicate said input data to said processor.

26. A method of making a microelectromechanical systems device, comprising:

depositing a first electrode layer over a transparent substrate;

patterning the first electrode layer to form lower electrodes in an array region;

depositing a conductive layer over the transparent substrate, wherein the conductive layer comprises a material selected from the group consisting of nickel, copper, chromium, and silver;

patterning the conductive layer to form a pattern for an electrical interconnect in a peripheral region;

depositing a sacrificial layer over the lower electrodes in the array region;

after patterning the conductive layer, depositing a second electrode layer over the sacrificial layer to form upper electrodes in the array region.

27. The method of claim 26 , wherein the first electrode layer is patterned before patterning the conductive layer.

28. The method of claim 26 , wherein the conductive layer is patterned before patterning the first electrode layer.

29. The method of claim 26 , further comprising a nickel layer over the upper electrodes.

30. The method of claim 26 layer, wherein the electrical interconnect contacts the upper electrodes to form a contact pad in the peripheral region.

31. The method of claim 30 , wherein the upper electrodes comprise aluminum and the conductive layer comprises nickel.

32. The method of claim 30 , further comprising mounting a driver connected to the contact pad.

33. The method of claim 26 , further comprising depositing a dielectric layer over the conductive layer and the lower electrodes after patterning the conductive layer.

34. The method of claim 26 , wherein the lower electrodes are formed over the conductive layer.

35. The method of claim 26 , wherein the conductive layer is formed over the lower electrodes.

36. The method of claim 26 , further comprising depositing a dielectric layer over the conductive layer, wherein the conductive layer is formed over the lower electrodes.

37. The method of claim 26 , wherein the device is an interferometric modulator.

38. The method of claim 26 , further comprising removing the sacrificial layer after patterning the upper electrodes.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2016
From: QUALCOMM MEMS TECHNOLOGIES, INC.
To: SNAPTRACK, INC.
Reel/Frame 039891/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2008
From: QUALCOMM INCORPORATED
To: QUALCOMM MEMS TECHNOLOGIES, INC.
Reel/Frame 020571/0253 →
CORRECTION TO ASSIGNEE PREVIOUSLY RECORDED ON REEL 019664 FRAME 0718 Recorded Aug 29, 2007
From: SASAGAWA, TERUO
To: QUALCOMM INCORPORATED
Reel/Frame 019768/0547 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2007
From: SASAGAWA, TERUO
To: QUALCOMM, INC.
Reel/Frame 019664/0718 →