IP Library Granted Patent US 7,831,884
Granted Patent B2
US 7,831,884 · App. 11/836,381 · Granted Nov 9, 2010

Method of correcting message errors using cyclic redundancy checks

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Quick Facts
Patent No.
US 7,831,884
App. No.
11/836,381
Granted
Nov 9, 2010
Kind
B2
Abstract

A method of correcting errors in a message transmitted over a digital communication channel, where the message was encoded using a CRC for purposes of error detection. A parity-check matrix representation of the CRC is computed for any fixed-length message, and that parity-check matrix is combined with the parity-check matrix for any error correcting code that used in conjunction with the CRC. The combined parity-check matrix is extended using sparsification algorithms to allow it to work well under a message passing decoder (MPD). Received messages are decoded using the message passing decoder, making it possible to correct more errors than if the CRC were decoded in a conventional manner.

Claims (5)

1. A method for correcting errors in a message received over a digital communications path, the message having been encoded with a cyclic redundancy check for error detection, the method comprising:

passing the message through a message passing decoder used for performing low-density parity checks, the message passing decoder employing a parity check matrix derived by expressing the cyclic redundancy check in a matrix format and then applying a sparsification algorithm to the matrix with the resulting matrix being an extended parity check matrix suitable for decoding the message using the message passing decoder; and,

the parity check matrix derived from the cyclic redundancy check being combined with a parity check matrix for any other block code used in the message, whereby all codes are represented by a single, sparsified parity check matrix.

2. The method of claim 1 in which all code cycles of a length 4 are eliminated from the extended parity check matrix.

3. The method of claim 1 in which the cyclic redundancy check is a 16 or 32 bit cyclic redundancy check.

Assignments (10)
TERMINATION AND RELEASE OF PATENT SECURITY AGREEMENT Recorded Mar 6, 2018
From: PNC BANK, NATIONAL ASSOCIATION
To: ACLARA TECHNOLOGIES LLC
Reel/Frame 045502/0776 →
RELEASE OF SECURITY INTEREST Recorded Feb 5, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ACLARA TECHNOLOGIES LLC; ACLARA METERS LLC
Reel/Frame 045245/0231 →
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 30, 2016
From: CERBERUS BUSINESS FINANCE, LLC
To: ACLARA TECHNOLOGIES LLC; ACLARA METERS LLC F/K/A MRH METERS LLC
Reel/Frame 039880/0908 →
SECURITY AGREEMENT Recorded Aug 30, 2016
From: ACLARA TECHNOLOGIES LLC; ACLARA METERS LLC
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 039872/0227 →
RELEASE OF SECURITY INTEREST Recorded Apr 21, 2014
From: BMO HARRIS BANK, N.A.
To: ACLARA TECHNOLOGIES, LLC
Reel/Frame 032715/0461 →
SECURITY INTEREST Recorded Apr 18, 2014
From: METER READINGS HOLDING, LLC; ACLARA TECHNOLOGIES LLC; ACLARA INTERNATIONAL LLC
To: PNC BANK, NATIONAL ASSOCIATION
Reel/Frame 032712/0931 →
SECURITY INTEREST Recorded Apr 4, 2014
From: ACLARA TECHNOLOGIES LLC
To: BMO HARRIS BANK N.A.
Reel/Frame 032608/0055 →
PATENT SECURITY AGREEMENT Recorded Mar 28, 2014
From: ACLARA TECHNOLOGIES LLC
To: CERBERUS BUSINESS FINANCE, LLC, AS AGENT
Reel/Frame 032554/0912 →
MERGER Recorded Jan 24, 2014
From: ACLARA POWER-LINE SYSTEMS INC.
To: ACLARA TECHNOLOGIES LLC
Reel/Frame 032036/0294 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2009
From: SPENCER, QUENTIN
To: ACLARA POWER-LINE SYSTEMS, INC.
Reel/Frame 023496/0603 →