Circuit topology for multiple loads
View Patent ↗A circuit topology for multiple loads is provided. In an embodiment, the circuit topology includes a driving terminal ( 50 ), a first node (A), a first receiving terminal ( 10 ), and a second receiving terminal ( 20 ). The driving terminal is coupled to the first node via a main transmission line ( 11 ), the first node is respectively coupled to the first and second receiving terminals via a first branch transmission line ( 13 ) and a second branch transmission line ( 12 ). A first resistor (R 2 ) is mounted on the second branch transmission line, a distance the signal travels from the driving terminal to the second receiving terminal via the main transmission line and the second branch transmission line is greater than a distance the signal travels from the driving terminal to the first receiving terminal via the main transmission and the first branch transmission line.
1. A circuit topology comprising:
a driving terminal;
a first node coupled to the driving terminal via a main transmission line;
a second node coupled to the first node via a first branch transmission line;
a first signal receiving terminal coupled to the first node via a second branch transmission line;
a second signal receiving terminal coupled to the second node via a third branch transmission line;
a third signal receiving terminal coupled to the second node via a fourth branch transmission line, wherein a distance a signal travels from the driving terminal to the third signal receiving terminal is greater than a distance the signal travels from the driving terminal to the first and second signal receiving terminals; and
wherein a first resistor is connected between two opposite terminals of the fourth branch transmission line, and wherein the first resistor reduces signal reflections from the third signal receiving terminal.
2. The circuit topology as claimed in claim 1 , further comprising a second resistor connected to the first branch transmission line between the first node and second nodes, wherein the second resistor reduces signal reflections from the second and third signal receiving terminals.
3. The circuit topology as claimed in claim 1 , wherein the first resistor is 56 ohm.
4. The circuit topology as claimed in claim 2 , wherein the second resistor is 22 ohm.
5. A circuit topology comprising:
a signal transmitting terminal for transmitting a signal;
a first node coupled to the signal transmitting terminal via a main transmission line;
a first signal receiving terminal coupled to the first node via a first branch transmission line;
a second signal receiving terminal coupled to the first node via a second branch transmission line, wherein a distance the signal travels from the signal transmitting terminal to the second signal receiving terminal via the main transmission line and the second branch transmission line is greater than a distance the signal travels from the signal transmitting terminal to the first signal receiving terminal via the main transmission line and the first branch transmission line; and
a third signal receiving terminal with a third branch transmission line coupled to the second branch transmission line via a second node, wherein the second signal receiving terminal is coupled to the second node via a fourth branch transmission line, a distance the signal travels from the second node to the third signal receiving terminal is greater than a distance the signal travels from the second node to the second signal receiving terminal;
wherein a first resistor is connected to the second branch transmission line between the first and second nodes, the first resistor reduces signal reflections from the second and third signal receiving terminals, and wherein a second resistor is connected between two opposite terminals of the third branch transmission line, and the second resistor reduces signal reflections from the third signal receiving terminal.