Method of fabricating a thin film transistor array panel
View Patent ↗A thin film transistor array panel includes a source electrode and a drain electrode composed of a Mo alloy layer and a Cu layer, and an alloying element of the Mo alloy layer forms a nitride layer as a diffusion barrier against the Cu layer. The nitride layer can be formed between the Mo alloy layer and the Cu layer, between the Mo alloy layer and the semiconductor layer or in the Mo alloy layer. A method of fabricating a thin film transistor array panel includes forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer. The nitrogen treatment can be performed before forming the first conductive layer, after forming the first conductive layer, or during forming the first conductive layer.
1. A method of fabricating a thin film transistor array panel comprising:
forming a gate line on a substrate;
forming a gate insulating layer on the gate line;
forming a semiconductor layer on the gate insulating layer;
forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and
performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer.
2. The method of claim 1 , wherein the alloying element of the first conductive layer is Ti, Ta, Zr or Nb.
3. The method of claim 2 , wherein the content of the alloying element is more than 10 atm %.
4. The method of claim 1 , wherein the content of nitrogen in the nitride layer is from 0.01 atm % to 50 atm %.
5. The method of thin film array panel of claim 1 , further comprising forming a second insulating layer on the data line.
6. The method of claim 1 , wherein the nitrogen treatment is performed before forming the first conductive layer.
7. The method of claim 1 , wherein the nitrogen treatment is performed after forming the first conductive layer.
8. The method of claim 1 , wherein the nitrogen treatment is performed during forming the first conductive layer.
9. The method of claim 1 , wherein the thickness of the nitride layer is more than 5 A.
10. The method of claim 1 , further comprising forming a second insulating layer on the data line and a forming a pixel electrode on the second insulating layer.